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VC-801-EAW-FABN-16M7772160

CMOS Output Clock Oscillator, 16.777216MHz Nom, ROHS COMPLIANT, HERMETIC SEALED, CERAMIC PACKAGE-4

器件类别:无源元件    振荡器   

厂商名称:Vectron International, Inc.

厂商官网:http://www.vectron.com/

器件标准:  

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
Vectron International, Inc.
包装说明
ROHS COMPLIANT, HERMETIC SEALED, CERAMIC PACKAGE-4
Reach Compliance Code
compliant
其他特性
ENABLE/DISABLE FUNCTION; TR, 7 INCH
最长下降时间
6 ns
频率调整-机械
NO
频率稳定性
25%
JESD-609代码
e4
安装特点
SURFACE MOUNT
标称工作频率
16.777216 MHz
最高工作温度
70 °C
最低工作温度
-10 °C
振荡器类型
CMOS
输出负载
30 pF
物理尺寸
5.0mm x 3.2mm x 1.4mm
最长上升时间
6 ns
最大供电电压
3.63 V
最小供电电压
2.97 V
标称供电电压
3.3 V
表面贴装
YES
最大对称度
55/45 %
端子面层
Gold (Au) - with Nickel (Ni) barrier
Base Number Matches
1
文档预览
CMOS Crystal Oscillator
Previous Vectron Model VCC4
VC-801
VC-801
Description
Vectron’s VC-801 Crystal Oscillator (XO) is a quartz stabilized square wave generator with a CMOS output. The VC-801 uses fundamental or 3rd
overtone crystals resulting in very low jitter performance, and a monolithic IC which improves reliability and reduces cost.
Features
CMOS output XO
Output Frequencies from 32.768kHz to 125.000MHz
5.0, 3.3, 2.5 or 1.8 V Operation
Low Jitter Performance
Output Disable Feature
Excellent 20ppm temperature stability
-10/70°C, -20/70°C, -40/85°C or -55/125°C operating temperature
Small Industry Standard Package, 3.2x5.0x1.3mm
Applications
SONET/SDH/DWDM
Ethernet, GE, SynchE
Storage Area Networking
Fiber Channel
Digital Video
Broadband Access
Base Stations, Picocells
Product is compliant to RoHS directive
and fully compatible with lead free assembly
Block Diagram
V
DD
Output
Crystal
Oscillator
E/D
Page1
GND
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Table 1. Electrical Performance, 5V Option
Parameter
Voltage
1
Max Voltage
Current
2
≤20.000MHz
20.001 to 50.000MHz
50.001 to 75.000MHz
Current, Output Disabled
Specifications
Performance Specifications
Symbol
V
DD
I
DD
Min
Supply
4.5
-0.7
Typical
5.0
Maximum
5.5
7
10
30
40
30
Units
V
V
mA
mA
mA
uA
MHz
ppm
Frequency
Nominal Frequency
3
Stability
4
, (Ordering Option)
Outputs
Output Logic Levels
2
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Load
Output Rise /Fall Time
2
<20.000MHz
20.000 to 50.000MHz
50.001 to 75.000MHz
Output Leakage, Output Disabled
Duty Cycle
2,5
Period Jitter
6
RMS
Peak-Peak
RMS Jitter, 12kHz-20MHz
Output Enable/Disable
7
Output Enable
Output Disable
Disable time
Enable Internal Pull-Up Resistor
Start-Up Time
Operating Temp, (Ordering Option)
1]
2]
3]
4]
5]
6]
7]
f
N
1.544
75.000
±20, ±25, ±32, ±50, ±100
V
OH
V
OL
I
OH
I
OL
I
OUT
t
R
/t
F
0.9*V
DD
16
16
0.1*V
DD
V
V
mA
mA
pF
ns
ns
ns
uA
%
ps
ps
15
8
5
2
±10
45
50
3.0
21
0.5
Enable/Disable
1
55
I
Z
фJ
фJ
ps
V
IH
V
IL
t
D
4.0
0.8
100
100
8
V
V
ns
Kohm
ms
°C
t
SU
T
OP
-10/70, -20/70, -40/85, -55/125
The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF.
Parameters are tested a test circuit shown in Figure 1.
See Standard Frequencies and Ordering Information tables for more specific information.
Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging for 50 and 100ppm options.
Duty Cycle is measured as On Time/Period, see Fig 2.
Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples, see Application Note for Typical Phase Noise and Jitter Performance.
The Output is Enabled if the Enable/Disable is left open.
t
R
I
DD
+
4
.1µF
.01µF
1
+
3
2
15pF
V
OH
50%
V
OL
On Time
Period
Fig 1: Test Circuit
Page2
t
F
V
DD
Fig 2: Waveform
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Specifications
Performance Specifications
Table 2. Electrical Performance, 3.3V Option
Parameter
Voltage
1
Maximum Voltage
Current
2
32.768kHz to 1.499MHz
1.500 to 20.000MHz
20.001 to 50.000MHz
50.001 to 100.000MHz
100.001 to 125.000MHz
Current, Output Disabled
Frequency
Nominal Frequency
3,8
Stability
4
, (Ordering Option)
Outputs
Output Logic Levels
2
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Load
Output Rise /Fall Time
2
32.768kHz to 345.6kHz
345.6kHz to 20.000MHz
20.001 to 50.000MHz
50.001 to 75.000MHz
75.001 to 125.000MHz
Output Leakage, Output Disabled
Duty Cycle
2
,
5
Period Jitter
6
RMS
Peak-Peak
RMS Jitter, 12kHz-20MHz
Output Enable/Disable
7
Output Enable
Output Disable
Disable time
Enable Internal Pull-Up Resistor
Start-Up Time
Operating Temp, (Ordering Option)
1]
2]
3]
4]
5]
6]
7]
8]
Symbol
V
DD
I
DD
Min
Supply
2.97
-0.5
Typical
3.3
Maximum
3.63
5
5
7
20
30
40
30
Units
V
V
mA
mA
mA
mA
mA
uA
MHz
ppm
f
N
1
125.000
±20, ±25, ±32, ±50, ±100
V
OH
V
OL
I
OH
I
OL
I
OUT
t
R
/t
F
0.9*V
DD
8
8
0.1*V
DD
V
V
mA
mA
pF
ns
ns
ns
ns
ns
uA
%
ps
ps
15
200
6
4
3
2
±10
45
50
3.0
21
0.5
Enable/Disable
1
55
I
Z
фJ
фJ
ps
V
IH
V
IL
t
D
2.0
0.5
100
100
8
V
V
ns
Kohm
ms
°C
t
SU
T
OP
-10/70, -20/70, -40/85, -55/125
The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF.
Parameters are tested a test circuit shown in Figure 1.
See Standard Frequencies and Ordering Information tables for more specific information.
Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging for 50 and 100ppm options.
Duty Cycle is measured as On Time/Period, see Fig 2.
Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples, see Application Note for Typical Phase Noise and Jitter Performance.
The Output is Enabled if the Enable/Disable is left open.
Continuous frequency range is 1-125 MHz. 32.768 kHz is also available.
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Page3
Specifications
Performance Specifications
Table 3. Electrical Performance, 2.5V Option
Parameter
Voltage
1
Maximum Voltage
Current
2
32.768kHz to 1.499MHz
1.500 to 20.000MHz
20.001 to 50.000MHz
50.001 to 75.000MHz
75.001 to 100.000MHz
100.001 to 125.000MHz
Current, Output Disabled
Frequency
Nominal Frequency
3,8
Stability
4
,
(Ordering
Option)
Outputs
Output Logic Levels
2,3
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Output Logic High Drive
5
Output Logic Low Drive
5
Load
Output Rise /Fall Time
2
32.768kHz to 345.6kHz
345.6kHz to 20.000MHz
20.001 to 50.000MHz
50.001 to 75.000MHz
75.001 to 125.000MHz
Output Leakage, Output Disabled
Duty Cycle
2,6
Period Jitter
7
RMS
Peak-Peak
RMS Jitter, 12kHz-20MHz
Output Enable/Disable
8
Output Enable
Output Disable
Disable time
Enable Internal Pull-Up Resistor
Start-Up Time
Operating Temp, (Ordering Option)
1]
2]
3]
4]
5]
6]
7]
8]
Symbol
V
DD
I
DD
Min
Supply
2.25
-0.5
Typical
2.5
Maximum
2.75
5
5
7
15
20
25
30
30
Units
V
V
mA
mA
mA
mA
mA
mA
uA
MHz
ppm
f
N
1
125.000
±20, ±25, ±32, ±50, ±100
V
OH
V
OL
I
OH
I
OL
I
OH
I
OL
I
OUT
t
R
/t
F
0.9*V
DD
4
4
8
8
0.1*V
DD
V
V
mA
mA
mA
mA
pF
ns
ns
ns
ns
ns
uA
%
ps
ps
15
200
6
5
3
2
±10
45
50
3.0
21
0.5
Enable/Disable
1
55
I
Z
фJ
фJ
ps
V
IH
V
IL
t
D
1.75
0.5
100
V
V
ns
Kohm
t
SU
T
OP
-10/70, -20/70, -40/85, -55/125
8
ms
°C
The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF.
Parameters are tested a test circuit shown in Figure 1.
See Standard Frequencies and Ordering Information tables for more specific information.
Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging for 50 and 100ppm options.
Duty Cycle is measured as On Time/Period, see Fig 2.
Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples, see Application Note for Typical Phase Noise and Jitter Performance.
The Output is Enabled if the Enable/Disable is left open.
Continuous frequency range is 1-125 MHz. 32.768 kHz is also available.
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Page4
Performance Specifications
Table 4. Electrical Performance, 1.8V Option
Parameter
Voltage
1
Maximum Voltage
Current
2
≤20.000MHz
20.001 to 70.000MHz
70.001 to 100.000MHz
100.001 to 125.000MHz
Current, Output Disabled
Frequency
Nominal Frequency
3
Stability
4
, (Ordering Option)
Outputs
Output Logic Levels
2,3
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Output Logic High Drive
5
Output Logic Low Drive
5
Load
Output Rise /Fall Time
2
<20.000MHz
20.000 to 50.000MHz
50.001 to 125.000MHz
Output Leakage, Output Disabled
Duty Cycle
2,6
Period Jitter
7
RMS
Peak-Peak
RMS Jitter, 12kHz-20MHz
Output Enable/Disable
8
Output Enable
Output Disable
Disable time
Enable Internal Pull-Up Resistor
Start-Up Time
Operating Temp, Ordering Option
1]
2]
3]
4]
5]
6]
7]
Symbol
V
DD
I
DD
Min
Supply
1.71
-0.5
Typical
1.8
Maximum
1.89
3.6
5
15
20
25
30
Units
V
V
mA
mA
mA
mA
uA
MHz
ppm
f
N
1.544
125.000
±20, ±25, ±32, ±50, ±100
V
OH
V
OL
I
OH
I
OL
I
OH
I
OL
I
OUT
t
R
/t
F
0.9*V
DD
2.8
2.8
8
8
0.1*V
DD
V
V
mA
mA
mA
mA
pF
ns
ns
ns
uA
%
ps
ps
15
6
5
3
±10
45
50
3.0
21
0.5
Enable/Disable
1
55
I
Z
фJ
фJ
ps
V
IH
V
IL
t
D
1.26
0.5
100
1
8
V
V
ns
Mohm
ms
°C
t
SU
T
OP
-10/70, -20/70, -40/85, -55/125
The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF.
Parameters are tested a test circuit shown in Figure 1.
See Standard Frequencies and Ordering Information tables for more specific information.
Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging for 50 and 100ppm options.
Duty Cycle is measured as On Time/Period, see Fig 2.
Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples, see Application Note for Typical Phase Noise and Jitter Performance.
The Output is Enabled if the Enable/Disable is left open.
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Page5
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