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VCC4-B1E-12M3530000

CMOS Output Clock Oscillator, 12.353MHz Nom

器件类别:无源元件    振荡器   

厂商名称:Microchip(微芯科技)

厂商官网:https://www.microchip.com

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
Objectid
145206437058
包装说明
DILCC4,.12
Reach Compliance Code
compliant
其他特性
TRI-STATE
最长下降时间
6 ns
频率调整-机械
NO
频率稳定性
25%
JESD-609代码
e4
安装特点
SURFACE MOUNT
端子数量
4
标称工作频率
12.353 MHz
最高工作温度
70 °C
最低工作温度
-10 °C
振荡器类型
CMOS
输出负载
15 pF
最大输出低电流
8 mA
封装等效代码
DILCC4,.12
物理尺寸
5mm x 3.2mm x 1.4mm
最长上升时间
6 ns
最大压摆率
7 mA
最大供电电压
3.63 V
最小供电电压
2.97 V
标称供电电压
3.3 V
表面贴装
YES
最大对称度
40/60 %
端子面层
Gold (Au) - with Nickel (Ni) barrier
文档预览
VC-801
CMOS Crystal Oscillator
Previous Vectron Model VCC4
VC-801
Description
Vectron’s VC-801 Crystal Oscillator (XO) is a quartz stabilized square wave generator with a CMOS output. The VC-801 uses
fundamental or 3rd overtone crystals resulting in very low jitter performance, and a monolithic IC which improves reliability and
reduces cost.
Features
CMOS output XO
Output Frequencies from 32.768kHz to 125.000MHz
5.0, 3.3, 2.5 or 1.8 V Operation
Low Jitter Performance
Output Disable Feature
• ±
20ppm Frequency Stability Available
• Operating Temperature ranging from -55°C to +125°C
• Small Industry Standard Package, 5.0 x 3.2 x 1.3 mm
Product is compliant to RoHS directive
and fully compatible with lead free assembly
Applications
SONET/SDH/DWDM
Ethernet, GE, SynchE
Storage Area Networking
Fiber Channel
Digital Video
Broadband Access
Base Stations, Picocells
Block Diagram
V
DD
Output
Crystal
Oscillator
E/D
Page1
GND
Specifications
Performance Specifications
Table 1. Electrical Performance, 5V Option
Parameter
Voltage
1
Max Voltage
Current
2
≤20.000MHz
20.001 to 50.000MHz
50.001 to 75.000MHz
Current, Output Disabled
Frequency
Nominal Frequency
3
Stability
4,8
(Ordering Option)
Output Logic Levels
2
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Load
Output Rise /Fall Time
2
<20.000MHz
20.000 to 50.000MHz
50.001 to 75.000MHz
Output Leakage, Output Disabled
Duty Cycle
2,5
Period Jitter
6
RMS
Peak-Peak
RMS Jitter, 12kHz-20MHz
Output Enable/Disable
7
Output Enable
Output Disable
Disable time
Enable Internal Pull-Up Resistor
Start-Up Time
Operating Temp (Ordering Option)
1]
2]
3]
4]
5]
6]
7]
8]
Symbol
V
DD
I
DD
Min
4.5
-0.7
Typical
Supply Voltage
5.0
Max
5.5
7
10
30
40
30
Units
V
V
mA
mA
mA
uA
MHz
ppm
f
N
1.544
±20, ±25, ±32, ±50, ±100
Output
75.000
V
OH
V
OL
I
OH
I
OL
t
R
/t
F
0.9*V
DD
0.1*V
DD
16
16
15
8
5
2
V
V
mA
mA
pF
ns
ns
ns
uA
%
ps
ps
I
Z
45
фJ
3.0
21
фJ
Enable/Disable
V
IH
V
IL
t
D
100
t
SU
T
OP
4.0
0.5
50
±10
55
1
ps
0.8
100
8
-10/70, -20/70, -40/85, -40/105, -40/125, -55/105, -55/125
V
V
ns
Kohm
ms
°C
The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF.
Parameters are tested with the test circuit shown in Fig 1.
See Standard Frequencies and Ordering Information tables for more specific information.
Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging for
±
50 and
±
100ppm options.
Duty Cycle is measured as On Time/Period, see Fig 2.
Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples, see Application Note for Typical Phase Noise and Jitter Performance.
The Output is Enabled if the Enable/Disable is left open.
Only ±50 and ±100 stability option available for -40/105 °C, -40/125 °C, -55/105 °C and -55/125 °C Operating temperature range.
I
DD
+
V
DD
-
4
.1µF
.01µF
1
+
-
Fig 1: Test Circuit
t
R
V
OH
3
2
15pF
50%
V
OL
On Time
Period
Fig 2: Waveform
Page2
t
F
Specifications
Performance Specifications
Table 2. Electrical Performance, 3.3V Option
Parameter
Voltage
1
Max Voltage
Current
2
32.768kHz to 1.499MHz
1.500 to 20.000 MHz
20.001 to 50.000MHz
50.001 to 100.000MHz
100.001 to 125.000MHz
Current, Output Disabled
Frequency
Nominal Frequency
3
Stability
4,8
(Ordering Option)
Output Logic Levels
2
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Load
Output Rise /Fall Time
2
32.768kHz to 345.6kHz
345.6kHz to 20.000MHz
20.001 to 50.000MHz
50.001 to 75.000MHz
75.001 to 125.000MHz
Output Leakage, Output Disabled
Duty Cycle
2,5
Period Jitter
6
RMS
Peak-Peak
RMS Jitter, 12kHz-20MHz
Output Enable/Disable
7
Output Enable
Output Disable
Disable time
Enable Internal Pull-Up Resistor
Start-Up Time
Operating Temp (Ordering Option)
1]
2]
3]
4]
5]
6]
7]
8]
Symbol
V
DD
I
DD
Min
2.97
-0.5
Typical
Supply Voltage
3.30
Max
3.63
5.0
5
7
20
30
40
30
Units
V
V
mA
mA
mA
mA
mA
uA
MHz
ppm
f
N
0.032
±20, ±25, ±32, ±50, ±100
Output
125.000
V
OH
V
OL
I
OH
I
OL
t
R
/t
F
0.9*V
DD
0.1*V
DD
8
8
15
200
6
4
3
2
V
V
mA
mA
pF
ns
ns
ns
ns
ns
uA
%
ps
ps
I
Z
45
фJ
3.0
21
фJ
Enable/Disable
V
IH
V
IL
t
D
100
t
SU
T
OP
2.0
0.5
50
±10
55
1
ps
0.5
100
8
-10/70, -20/70, -40/85, -40/105, -40/125, -55/105, -55/125
V
V
ns
Kohm
ms
°C
The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF.
Parameters are tested with the test circuit shown in Fig 1.
See Standard Frequencies and Ordering Information tables for more specific information.
Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging for
±
50 and
±
100ppm options.
Duty Cycle is measured as On Time/Period, see Fig 2.
Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples, see Application Note for Typical Phase Noise and Jitter Performance.
The Output is Enabled if the Enable/Disable is left open.
Only ±50 and ±100 stability option available for -40/105 °C, -40/125 °C, -55/105 °C and -55/125 °C Operating temperature range.
Page3
Specifications
Performance Specifications
Table 3. Electrical Performance, 2.5V Option
Parameter
Voltage
1
Max Voltage
Current
2
32.768kHz to 1.499MHz
1.500 to 20.000 MHz
20.001 to 50.000MHz
50.001 to 75.000MHz
75.001 to 100.000MHz
100.001 to 125.000MHz
Current, Output Disabled
Frequency
Nominal Frequency
3
Stability
4,9
(Ordering Option)
Output Logic Levels
2
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Output Logic High Drive
8
Output Logic Low Drive
8
Load
Output Rise /Fall Time
2
32.768kHz to 345.6kHz
345.6kHz to 20.000MHz
20.001 to 50.000MHz
50.001 to 75.000MHz
75.001 to 125.000MHz
Output Leakage, Output Disabled
Duty Cycle
2,5
Period Jitter
6
RMS
Peak-Peak
RMS Jitter, 12kHz-20MHz
Output Enable/Disable
7
Output Enable
Output Disable
Disable time
Enable Internal Pull-Up Resistor
Start-Up Time
Operating Temp (Ordering Option)
1]
2]
3]
4]
5]
6]
7]
8]
9]
Symbol
V
DD
I
DD
Min
2.25
-0.5
Typical
Supply Voltage
2.50
Max
2.75
5.0
5
7
15
20
25
30
30
Units
V
V
mA
mA
mA
mA
mA
mA
uA
MHz
ppm
f
N
0.032
±20, ±25, ±32, ±50, ±100
Output
125.000
V
OH
V
OL
I
OH
I
OL
I
OH
I
OL
I
OUT
t
R
/t
F
0.9*V
DD
0.1*V
DD
4
4
8
8
15
200
6
5
3
2
V
V
mA
mA
mA
mA
pF
ns
ns
ns
ns
ns
uA
%
ps
ps
I
Z
45
фJ
3.0
21
фJ
Enable/Disable
V
IH
V
IL
t
D
100
t
SU
T
OP
1.75
0.5
50
±10
55
1
ps
0.5
100
8
-10/70, -20/70, -40/85, -40/105, -40/125, -55/105, -55/125
V
V
ns
Kohm
ms
°C
The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF.
Parameters are tested with the test circuit shown in Fig 1.
See Standard Frequencies and Ordering Information tables for more specific information.
Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging for
±
50 and
±
100ppm options.
Duty Cycle is measured as On Time/Period, see Fig 2.
Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples, see Application Note for Typical Phase Noise and Jitter Performance.
The Output is Enabled if the Enable/Disable is left open.
For 3rd overtone crystal designs.
Only ±50 and ±100 stability option available for -40/105 °C, -40/125 °C, -55/105 °C and -55/125 °C Operating temperature range.
Page4
Performance Specifications
Table 4. Electrical Performance, 1.8V Option
Parameter
Voltage
1
Max Voltage
Current
2
1.544 to 20.000 MHz
20.001 to 70.000MHz
70.001 to 100.000MHz
100.001 to 125.000MHz
Current, Output Disabled
Frequency
Nominal Frequency
3
Stability
4,9
(Ordering Option)
Output Logic Levels
2
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Output Logic High Drive
8
Output Logic Low Drive
8
Load
Output Rise /Fall Time
2
1.544 to 20.000MHz
20.001 to 50.000MHz
50.001 to 125.000MHz
Output Leakage, Output Disabled
Duty Cycle
2,5
Period Jitter
6
RMS
Peak-Peak
RMS Jitter, 12kHz-20MHz
Output Enable/Disable
7
Output Enable
Output Disable
Disable time
Enable Internal Pull-Up Resistor
Start-Up Time
Operating Temp (Ordering Option)
1]
2]
3]
4]
5]
6]
7]
8]
9]
Symbol
V
DD
I
DD
Min
1.71
-0.5
Typical
Supply Voltage
1.80
Max
1.89
3.6
5
15
20
25
30
Units
V
V
mA
mA
mA
mA
uA
MHz
ppm
f
N
1.544
±20, ±25, ±32, ±50, ±100
Output
125.000
V
OH
V
OL
I
OH
I
OL
I
OH
I
OL
t
R
/t
F
0.9*V
DD
0.1*V
DD
2.8
2.8
8
8
15
6
5
3
V
V
mA
mA
mA
mA
pF
ns
ns
ns
uA
%
ps
ps
I
Z
45
фJ
3.0
21
фJ
Enable/Disable
V
IH
V
IL
t
D
1
t
SU
T
OP
1.26
0.5
50
±10
55
1
ps
0.5
100
8
-10/70, -20/70, -40/85, -40/105, -40/125, -55/105, -55/125
V
V
ns
Mohm
ms
°C
The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF.
Parameters are tested with the test circuit shown in Fig 1.
See Standard Frequencies and Ordering Information tables for more specific information.
Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging for
±
50 and
±
100ppm options.
Duty Cycle is measured as On Time/Period, see Fig 2.
Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples, see Application Note for Typical Phase Noise and Jitter Performance.
The Output is Enabled if the Enable/Disable is left open.
For 3rd overtone crystal designs.
Only ±50 and ±100 stability option available for -40/105 °C, -40/125 °C, -55/105 °C and -55/125 °C Operating temperature range.
Page5
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