These enhancement-mode (normally-off) transistors utilize a
vertical DMOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and positive temperature coefficient inher-
ent in MOS devices. Characteristic of all MOS structures, these
devices are free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
Applications
❏
Motor controls
❏
Converters
❏
Amplifiers
❏
Switches
❏
Power supply circuits
❏
Drivers (relays, hammers, solenoids, lamps,
memories, displays, bipolar transistors, etc.)
Package Option
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
* Distance of 1.6 mm from case for 10 seconds.
Note: See Package Outline section for dimensions.
11/12/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
BV
DSS
BV
DGS
±30V
-55°C to +150°C
300°C
SGD
TO-92
1
VN0808
Thermal Characteristics
Package
TO-92
*
I
D
(continuous)*
0.3A
I
D
(pulsed)
1.9A
Power Dissipation
@ T
C
= 25
°
C
1W
θ
jc
°
C/W
125
θ
ja
°
C/W
170
I
DR
*
0.3A
I
DRM
1.9A
I
D
(continuous) is limited by max rated T
j
.
Electrical Characteristics
(@ 25°C unless otherwise specified)
Symbol
BV
DSS
V
GS(th)
I
GSS
I
DSS
Parameter
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Gate Body Leakage
Zero Gate Voltage Drain Current
Min
80
0.8
2.0
100
10
500
I
D(ON)
R
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
(ON)
t
(OFF)
V
SD
ON-State Drain Current
Static Drain-to-Source ON-State Resistance
Forward Transconductance
Input Capacitance
Common Source Output Capacitance
Reverse Transfer Capacitance
Turn-ON Time
Turn-OFF Time
Diode Forward Voltage Drop
0.85
170
50
40
10
10
10
ns
V
V
DD
= 25V, I
D
= 1A
R
GEN
= 25Ω
I
SD
= 0.35A, V
GS
= 0V
pF
V
GS
= 0V, V
DS
= 25V
f = 1 MHz
1.5
4.0
A
Ω
m
Typ
Max
Unit
V
V
nA
µA
Conditions
I
D
= 10µA, V
GS
= 0V
V
GS
= V
DS
, I
D
= 1mA
V
GS
=
±15V,
V
DS
= 0V
V
GS
= 0V, V
DS
= 80V
V
GS
= 0V, V
DS
= 0.8 x Max Rating
T
A
= 125°C
V
GS
= 10V, V
DS
= 10V
V
GS
= 10V, I
D
= 1A
V
DS
= 10V, I
D
= 0.5A
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
