VS-VSKDS200/045
www.vishay.com
Vishay Semiconductors
AAP Gen 7 (TO-240AA)
Power Modules Schottky Rectifier, 100 A
FEATURES
• 150 °C T
J
operation
• Low forward voltage drop
• High frequency operation
• Low thermal resistance
• UL pending
• Designed and qualified for industrial level
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
AAP Gen 7 (TO-240AA)
BENEFITS
• Excellent thermal performances obtained by the usage of
exposed direct bonded copper substrate
PRIMARY CHARACTERISTICS
I
F(AV)
V
R
Package
Circuit configuration
100 A
45 V
AAP Gen 7 (TO-240AA)
Two diodes doubler circuit
• High surge capability
• Easy mounting on heatsink
ELECTRICAL DESCRIPTION / APPLICATIONS
The VS-VSKDS200/045 Schottky rectifier doubler module
has been optimized for low reverse leakage at high
temperature. The proprietary barrier technology allows for
reliable operation up to 150 °C junction temperature.
Typical applications are in high current switching power
supplies, plating power supplies, UPS systems, converters,
freewheeling diodes, welding, and reverse battery
protection.
MECHANICAL DESCRIPTION
The AAP Gen 7, new generation of ADD-A-PAK module,
combines the excellent thermal performances obtained by
the usage of exposed direct bonded copper substrate, with
advanced compact simple package solution and simplified
internal structure with minimized number of interfaces.
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL
I
F(AV)
V
RRM
I
FSM
V
F
T
J
t
p
= 5 μs sine
100 A
pk
, T
J
= 125 °C
Range
CHARACTERISTICS
Rectangular waveform
VALUES
100
45
12 800
0.73
-55 to +150
UNITS
A
V
A
V
°C
VOLTAGE RATINGS
PARAMETER
Maximum DC reverse voltage
Maximum working peak reverse voltage
SYMBOL
V
R
V
RWM
VS-VSKDS200/045
45
UNITS
V
Revision: 03-May-17
Document Number: 94966
1
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-VSKDS200/045
www.vishay.com
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average forward current per leg
Maximum peak one cycle
non-repetitive surge current
Non-repetitive avalanche energy
Repetitive avalanche current
SYMBOL
I
F(AV)
I
FSM
10 ms sine or 6 ms rect. pulse
E
AS
I
AR
T
J
= 25 °C, I
AS
= 19 A, L = 1 mH
Current decaying linearly to zero in 1 μs
Frequency limited by T
J
maximum V
A
= 1.5 x V
R
typical
TEST CONDITIONS
50 % duty cycle at T
C
= 91 °C, rectangular waveform
5 μs sine or 3 μs rect. pulse
Following any rated
load condition and with
rated V
RRM
applied
VALUES
100
12 800
1700
180
15
mJ
A
A
UNITS
ELECTRICAL SPECIFICATIONS
PARAMETER
SYMBOL
100 A
Maximum forward voltage drop
V
FM
200 A
100 A
200 A
Maximum reverse leakage current
Maximum junction capacitance
Typical series inductance
Maximum voltage rate of change
Maximum RMS insulation voltage
I
RM
C
T
L
S
dV/dt
V
INS
T
J
= 25 °C
T
J
= 125 °C
TEST CONDITIONS
T
J
= 25 °C
T
J
= 125 °C
V
R
= Rated V
R
VALUES
0.67
0.92
0.73
1.14
10
800
5200
7.0
10 000
3000 (1 min)
3600 (1 s)
mA
pF
nH
V/μs
V
V
UNITS
V
R
= 5 V
DC
(test signal range 100 kHz to 1 MHz), 25 °C
Measured lead to lead 5 mm from package body
Rated V
R
50 Hz
THERMAL - MECHANICAL SPECIFICATIONS
PARAMETER
Maximum junction and storage
temperature range
Maximum thermal resistance,
junction to case per leg
Typical thermal resistance,
case to heatsink per module
Approximate weight
to heatsink
Mounting torque ± 10 %
busbar
Case style
A mounting compound is recommended and the torque
should be rechecked after a period of 3 h to allow for the
spread of the compound.
JEDEC
®
SYMBOL
T
J
, T
Stg
R
thJC
R
thCS
DC operation
TEST CONDITIONS
VALUES
-55 to +150
0.52
°C/W
0.1
75
2.7
4
Nm
3
TO-240AA compatible
g
oz.
UNITS
°C
Revision: 03-May-17
Document Number: 94966
2
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-VSKDS200/045
www.vishay.com
Vishay Semiconductors
10 000
I
F
- Instantaneous Forward Current (A)
1000
I
R
- Reverse Current (mA)
T
J
= 25 °C
T
J
= 150 °C
T
J
= 125 °C
1000
100
10
150°C
125 °C
100 °C
75 °C
50 °C
100
10
1
0.1
0.01
25 °C
1
0.000
0.500
1.000
1.500
2.000
2.500
0
10
20
30
40
50
V
FM
- Forward Voltage Drop (V)
Fig. 1 - Maximum Forward Voltage Drop Characteristics
V
R
- Reverse Voltage (V)
Fig. 2 - Typical Values of Reverse Current vs. Reverse Voltage
10 000
C
T
- Junction Capacitance (pF)
T
J
= 25 °C
1000
0
10
20
30
40
50
V
R
- Reverse Voltage (V)
Fig. 3 - Typical Junction Capacitance vs. Reverse Voltage
Z
thJC
- Thermal Impedance (°C/W)
1
0.1
D = 0.75
D = 0.50
D = 0.33
D = 0.25
D = 0.20
DC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
100
t
1
- Rectangular Pulse Duration (s)
Fig. 4 - Maximum Thermal Impedance Z
thJC
Characteristics
Revision: 03-May-17
Document Number: 94966
3
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-VSKDS200/045
www.vishay.com
160
Vishay Semiconductors
120
Allowable Case Temperature (°C)
120
100
80
60
40
20
0
0
50
100
150
200
250
Square
Wave (d=0,5)
Rated V
R
applied
DC
Average Power Loss (W)
140
100
80
60
40
D = 0.75
D = 0.50
D = 0.33
D = 0.25
D = 0.20
RMS limit
DC
20
0
0
30
60
90
120
150
I
F(AV)
- Average Forward Current (A)
Fig. 5 - Maximum Allowable Case Temperature vs.
Average Forward Current
I
F(AV)
- Average Forward Current (A)
Fig. 6 - Forward Power Loss Characteristics
I
FSM
- Non-Repetitive Surge Current (A)
10 000
At any rated load condition
and with rated V
RRM
applied
following
surge
1000
10
100
1000
10 000
t
p
- Square Wave Pulse Duration (µs)
Fig. 7 - Maximum Non-Repetitive Surge Current
L
High-speed
switch
Freewheel
diode
40HFL40S02
+ V
d
= 25 V
D.U.T.
IRFP460
R
g
= 25
Ω
Current
monitor
Fig. 8 - Unclamped Inductive Test Circuit
Note
(1)
Formula used: T = T - (Pd + Pd
C
J
REV
) x R
thJC
;
Pd = forward power loss = I
F(AV)
x V
FM
at (I
F(AV)
/D) (see fig. 6);
Pd
REV
= inverse power loss = V
R1
x I
R
(1 - D); I
R
at V
R1
= 80 % rated V
R
Revision: 03-May-17
Document Number: 94966
4
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-VSKDS200/045
www.vishay.com
ORDERING INFORMATION TABLE
Device code
Vishay Semiconductors
VS-VS KD
1
2
S
3
20
4
0
5
/
045
6
1
2
3
4
5
6
-
-
-
-
-
-
Vishay Semiconductors product
Circuit configuration:
KD = ADD-A-PAK - 2 diodes doubler circuit
S = Schottky diode
Average current rating (20 = 200 A)
Product silicon identification
Voltage rating (045 = 45 V)
CIRCUIT CONFIGURATION
(1)
~
(2)
+
(3)
-
LINKS TO RELATED DOCUMENTS
Dimensions
www.vishay.com/doc?95369
Revision: 03-May-17
Document Number: 94966
5
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
嵌入式系统
