W19B(L)320ST/B Data Sheet
4M
×
8/2M
×
16 3V(3.3V) FLASH MEMORY
Table of Contents-
1.
2.
3.
4.
5.
6.
GENERAL DESCRIPTION ......................................................................................................... 4
FEATURES ................................................................................................................................. 4
PIN CONFIGURATIONS ............................................................................................................ 5
BLOCK DIAGRAM ...................................................................................................................... 5
PIN DESCRIPTION..................................................................................................................... 5
FUNCTIONAL DESCRIPTION ................................................................................................... 6
6.1
Device Bus Operation..................................................................................................... 6
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
6.1.6
6.1.7
6.1.8
6.1.9
6.1.10
6.1.11
6.1.12
6.1.13
Word/Byte Configuration ..................................................................................................6
Reading Array Data ..........................................................................................................6
Writing Commands/Command Sequences.......................................................................6
Standby Mode ..................................................................................................................7
Automatic Sleep Mode .....................................................................................................7
#RESET: Hardware Reset Pin..........................................................................................7
Output Disable Mode........................................................................................................8
Autoselect Mode...............................................................................................................8
Sector/Sector Block Protection and Unprotection.............................................................8
Write Protect (#WP) .......................................................................................................8
Temporary Sector Unprotect ..........................................................................................9
Security Sector Flash Memory Region ...........................................................................9
Hardware Data Protection ............................................................................................10
Reading Array Data ........................................................................................................11
Reset Command.............................................................................................................11
Autoselect Command Sequence ....................................................................................11
Enter Security Sector/Exit Security Sector Command Sequence ...................................12
Byte/Word Program Command Sequence......................................................................12
Unlock Bypass Command Sequence .............................................................................12
Chip Erase Command Sequence ...................................................................................13
Sector Erase Command Sequence ................................................................................13
Erase Suspend/Erase Resume Commands ...................................................................14
DQ7: #Data Polling.........................................................................................................14
RY/#BY: Ready/#Busy ...................................................................................................15
DQ6: Toggle Bit I............................................................................................................15
DQ2: Toggle Bit II...........................................................................................................16
6.2
Command Definitions ................................................................................................... 10
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
6.2.7
6.2.8
6.2.9
6.3
Write Operation Status ................................................................................................. 14
6.3.1
6.3.2
6.3.3
6.3.4
-1-
Publication Release Date: March 23, 2004
Revision A2
W19B(L)320ST/B
6.3.5
6.3.6
6.3.7
Reading Toggle Bits DQ6/DQ2 ......................................................................................16
DQ5: Exceeded Timing Limits ........................................................................................16
DQ3: Sector Erase Timer ...............................................................................................17
7.
TABLE OF OPERATION MODES ............................................................................................ 18
7.1
Device Bus Operations ................................................................................................. 18
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
Autoselect Codes (High Voltage Method) .................................................................... 19
CFI Query Identification String...................................................................................... 26
Command Definitions ................................................................................................... 29
Write Operation Status ................................................................................................. 30
Temporary Sector Unprotect Algorithm ........................................................................ 31
In-System Sector Protect/Unprotect Algorithms........................................................... 32
Program Algorithm........................................................................................................ 33
Erase Algorithm ............................................................................................................ 33
Data Polling Algorithm .................................................................................................. 34
Toggle Bit Algorithm ..................................................................................................... 35
8.
ELECRICAL CHARACTERISTICS ........................................................................................... 36
8.1
Absolute Maximum Ratings .......................................................................................... 36
8.2
Operating Ranges......................................................................................................... 36
1.1.1 ............................................................................................................................................36
1.1.1 ............................................................................................................................................36
8.3
8.4
DC Characteristics........................................................................................................ 37
8.3.1
8.4.1
8.4.2
8.4.3
8.4.4
8.4.5
8.4.6
8.4.7
8.4.8
CMOS Compatible..........................................................................................................37
Test Condition ................................................................................................................38
AC Test Load and Waveforms .......................................................................................38
Read-Only Operations....................................................................................................39
Hardware Reset (#RESET) ............................................................................................39
Word/Byte Configuration (#BYTE)..................................................................................39
Erase And Program Operation .......................................................................................40
Temporary Sector Unprotect ..........................................................................................40
Alternate #CE Controlled Erase and Program Operations..............................................41
AC Characteristics ........................................................................................................ 38
9.
TIMING WAVEFORMS ............................................................................................................. 42
9.1
AC Read Waveform...................................................................................................... 42
9.2
9.3
9.4
9.5
9.6
Reset Waveform ........................................................................................................... 42
#BYTE Waveform for Read Operation ......................................................................... 43
#BYTE Waveform for Write Operation ......................................................................... 43
Programming Waveform............................................................................................... 44
Accelerated Programming Waveform........................................................................... 44
-2-
W19B(L)320ST/B
9.7
9.8
9.9
9.10
9.11
9.12
9.13
10.
11.
12.
13.
Chip/Sector Erase Waveform ....................................................................................... 45
#Data Polling Waveform (During Embedded Algorithms) ............................................ 45
Toggle Bit Waveform (During Embedded Algorithms) ................................................. 46
DQ 2 vs. DQ6 Waveform .............................................................................................. 46
Temporary Sector Unprotect Timing Diagram.............................................................. 47
Sector/Sector Block Protect and Unprotect Timing Diagram ....................................... 47
Alternate #CE Controlled Write (Erase/Program) Operation Timing............................ 48
LATCHUP CHARACTERISTICS .............................................................................................. 49
CAPACITANCE......................................................................................................................... 49
ORDERING INFORMATION .................................................................................................... 50
PACKAGE DIMENSIONS ......................................................................................................... 51
13.1 48-Ball TFBGA (measurements in millimeters) ............................................................ 51
13.2
48-Pin Standard Thin Small Outline Package (measured in millimeters) .................... 51
VERSION HISTORY ................................................................................................................. 52
14.
-3-
Publication Release Date: March 23, 2004
Revision A2
W19B(L)320ST/B
1. GENERAL DESCRIPTION
The W19B(L)320ST/B is a 32Mbit, 2.7−3.6(3.0−3.6) volt CMOS flash memory organized as 4M
×
8 or
2M
×
16 bits. For flexible erase capability, the 32 Mbits of data are divided into eight 8KB, and sixty-
three 64KB sectors. The word-wide (×16) data appears on DQ15−DQ0, and byte-wide (×8) data
appears on DQ7−DQ0. The device can be programmed and erased in-system with a standard
2.7−3.6V(3.0−3.6V) power supply. A 12-volt V
PP
is not required. The unique cell architecture of the
W19B320ST/B results in fast program/erase operations with extremely low current consumption
(compared to other comparable 3-volt flash memory products). The device can also be programmed
and erased by using standard EPROM programmers.
2. FEATURES
Performance
•
2.7~3.6-volt write (program and erase)
operations (W19B320S)
•
3.0~3.6-volt write (program and erase)
operations (W19L320S)
•
Fast write operation
−
Sector erase time: 0.7 Sec (typ.)
−
Chip erase time: 49 Sec (typ.)
−
Byte programming time: 5
µS
(typ.)
•
Read access time: 90 nS
•
Typical program/erase cycles:
−
100K
•
Twenty-year data retention
•
Ultra low power consumption
−
Active current (Read): 10 mA (typ.) at 5 MHz
−
Standby current: 0.2
µA
(typ.)
Architecture
•
Sector erase architecture
−
Eight 8KB, and sixty-three 64KB sectors
−
Top or bottom boot block configurations
available
−
Supports full chip erase
•
Security Sector Size: 256 Bytes
−
The Security Sector is an OTP; once the sector
is programmed, it cannot be erased
•
JEDEC standard byte-wide and word-wide
pinouts
•
TTL compatible I/O
•
Manufactured on WinStack 0.18µm process
technology
•
Available packages: 48-pin TSOP and 48-ball
TFBGA (8x11mm)
Software Features
•
Compatible with common Flash Memory
Interface (CFI) specification
−
Flash device parameters stored directly on
the device
−
Allows software driver to identify and use a
variety of different current and future Flash
products
•
Erase Suspend/Erase Resume
−
Suspends erase operations to allow
programming in same bank
•
End of program detection
−
Software method: Toggle bit/Data polling
•
Unlock Bypass Program command
−
Reduces overall programming time when
issuing multiple program command
sequences
Hardware Features
•
Ready/#Busy output (RY/#BY)
−
Detect program or erase cycle completion
•
Hardware reset pin (#RESET)
−
Reset the internal state machine to the read
mode
-4-
W19B(L)320ST/B
•
#WP/ACC input pin
−
Write protect (#WP) function allows
protection of two outermost boot sectors,
regardless of sector protect status
−
Acceleration (ACC) function accelerates
program timing
•
Sector Protection
−
Sectors can be locked in-system or via
programmer
−
Temporary Sector Unprotect allows changing
data in protected sectors in-system
3. PIN CONFIGURATIONS
4. BLOCK DIAGRAM
V
DD
V
SS
(Top View, Balls Face Down)
A6
A13
48-Ball TFBGA
C6
A14
B6
A12
D6
A15
E6
A16
F6
G6
H6
#BYTE DQ15/A-1 Vss
#CE
#OE
#WE
#WP/ACC
#BYTE
#RESET
DQ15/A-1
A0
.
.
.
A20
CONTROL
OUTPUT
BUFFER
DQ0
.
.
DQ15/A-1
A5
A9
B5
A8
C5
A10
D5
A11
E5
DQ7
F5
DQ14
G5
DQ13
H5
DQ6
A4
B4
C4
NC
D4
A19
E4
DQ5
F4
DQ12
G4
V
DD
H4
DQ4
#WE #RESET
A3
A2
A7
B3
B2
A17
C3
C2
A6
D3
A20
E3
DQ2
F3
DQ10
G3
DQ11
H3
DQ3
DECODER
BANK
RY/#BY #WP/ACC A18
D2
A5
E2
DQ0
F2
DQ8
G2
DQ9
H2
DQ1
A1
A3
B1
A4
C1
A2
D1
A1
E1
A0
F1
#CE
G1
#OE
H1
Vss
5. PIN DESCRIPTION
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
#WE
#RESET
NC
#WP/ACC
RY/#BY
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
48-pin
TSOP
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
#BYTE
Vss
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
V
DD
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
#OE
Vss
#CE
A0
SYMBOL
A0−A20
DQ0−DQ14
DQ15/A-1
#CE
#OE
#WE
#WP/ACC
#BYTE
#RESET
RY/#BY
V
DD
Vss
NC
PIN NAME
Address Inputs
Data Inputs/Outputs
Word
mode
DQ15 is Data
Inputs/Outputs
Byte mode A-1 is Address input
Chip Enable
Output Enable
Write Enable
Hardware Write Protect/
Acceleration Pin
Byte Enable Input
Hardware Reset
Ready/Busy Status
Power Supply
Ground
No Connection
-5-
Publication Release Date: March 23, 2004
Revision A2
DSP 与 ARM 处理器
