W91030B
Table of Content-
1.
2.
3.
4.
5.
6.
7.
GENERAL DESCRIPTION ......................................................................................................... 2
FEATURES ................................................................................................................................. 2
PIN CONFIGURATION ............................................................................................................... 3
PIN DESCRIPTION..................................................................................................................... 3
SYSTEM DIAGRAM.................................................................................................................... 5
BLOCK DIAGRAM ...................................................................................................................... 5
FUNCTIONAL DESCRIPTION ................................................................................................... 6
7.1
7.2
7.3
7.4
7.5
8.
8.1
8.2
8.3
8.4
8.5
8.6
9.
9.1
9.2
10.
11.
12.
Ring Detector .................................................................................................................. 6
Input Pre-processor ........................................................................................................ 7
Dual Tone Alert Signal Detection ................................................................................... 8
FSK Demodulation........................................................................................................ 10
Other Functions ............................................................................................................ 12
Absolute Maximum Ratings .......................................................................................... 14
Recommended Operating Conditions .......................................................................... 14
DC Electrical Characteristics ........................................................................................ 14
Electrical Characteristics - Gain Control OP-Amplifier ................................................. 16
AC Electrical Characteristics ........................................................................................ 16
AC Timing Characteristics ............................................................................................ 17
Application Circuit ......................................................................................................... 22
Application Environment ............................................................................................... 24
ELECTRICAL CHARACTERISTICS......................................................................................... 14
APPLICATION INFORMATION ................................................................................................ 22
PACKAGE DIMENSIONS ......................................................................................................... 30
ORDERING INFORMATION .................................................................................................... 31
REVISION HISTORY ................................................................................................................ 32
The information described in this document is the exclusive intellectual property of Winbond Electronics Corporation and
shall not be reproduced without permission from Winbond.
Winbond provides this document for reference purposes of W-based system design only. Winbond assumes no responsibility
for errors or omissions. All data and specifications are subject to change without notice.
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Publication Release Date: Sep. 27, 2005
Revision A2
W91030B
1. GENERAL DESCRIPTION
The Winbond Caller Identification device W91030B, is a low power CMOS integrated circuit used to
receive physical layer signals transmitted according to Bellcore and British Telecom (BT)
specifications. There are two types of Caller Identifications, the first type is on-hook calling with caller
ID message and the second type is call on waiting. The W91030B device provides all the features and
functions of the Caller Identification specification for both these types, including FSK demodulation,
Tone Alert Signal detection and ring detection. The FSK demodulation function can demodulate Bell
202 and CCITT V.23 Frequency Shift Keying (FSK) with 1200 baud rate. The Tone Alert Signal detect
function can detect the dual tones of the Bellcore CPE* Tone Alerting Signal (CAS) and the BT idle
State and Loop State Tone Alert Signal. The line reversal for BT, ring burst for CCA or ring signal for
Bellcore can be detected by the ring detector.
There are two modes of FSK data output interface. The first mode is a data transfer activated by the
device, whose clock and data change depending upon the changing frequency of the FSK analog
signal input. The second mode allows a microcontroller to extract 8-bit data from the device serially;
the device notifies the micro-controller when 8-bit data has been received.
Note:
"CPE*" Customer Primises Equipment
2. FEATURES
Compatible with Bellcore TR-NWT-000030 & SR-TSV-002476, British Telecom (BT) SIN227, U.K.
Cable Communications Association (CCA) specification
Ring and line reversal detection
Bellcore CPE Alerting Signal (CAS) and BT idle State and Loop State Tone Alerting Signal
detection use dual tone alerting signal detector
BELL 202 and CCITT V.23 FSK demodulation with 1200 baud rate
Use 3.579545 MHz crystal or ceramic resonator
Low power CMOS technology with sleep mode
High input sensitivity
Variable gain input amplifier
FSK carry detect output
Two modes for 3-wire FSK data interface
Packaged in 24-pin 0.6 inch (600 mil) plastic DIP (W91030B) and 24-pin 0.3 inch (300 mil) plastic
SOP (W91030BS).
APPLICATIONS
Bellcore Calling Identity Delivery (CID), and BT Calling Line Identity Presentation (CLIP), CCA
CLIP systems
Feature phones
Phone set adjunct boxes
FAX and answering machines
Data base telephone system and Computer Telephony Integration (CTI) systems
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Publication Release Date: Sep. 27, 2005
Revision A2
W91030B
3. PIN CONFIGURATION
INP
INN
GCFB
VREF
CAP
RNGDI
RNGRC
RNGON
MODE
OSCI
OSCO
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
V
DD
ALGRC
ALGR
ALGO
INTN
FCDN
FDRN
DATA
DCLK
FSKE
SLEEP/RESET
TEST2
Top View
19
18
17
16
15
14
13
4. PIN DESCRIPTION
PIN
NAME
TYPE
DESCRIPTION
1
2
3
INP
INN
GCFB
I
I
O
Non-inverting Input of the gain control op-amp.
Inverting Input of the gain control op-amp.
Op-amp Feed-back Gain Control signal. Select the input gain by
connecting this pin and the INN pin with a feed-back resistor. It is
recommended that the op-amp be set to unity gain.
Reference Voltage. Nominally, V
DD
/2 is used to bias the input of the gain
control op-amp.
Must be connected a 0.1
μF
capacitor to V
SS
.
Ring Detect Input (Schmitt trigger input). Used for ring detection and line
reversal detection. Must maintain a voltage between V
DD
and V
SS
.
Ring RC (Open drain output and schmitt trigger input). Used to set the time
interval from the end of RNGDI pin to the inactive condition of the RNGON
pin. An external resistor must connected to V
DD
and a capacitor connected
to V
SS
, the time interval is the RC time constant.
Ring detection output (Low active). Indicates the detection of line reversal
and/or ringing.
FSK Data interface MODE select. Sets the FSK data output interface in
mode 0 when low, or in mode 1 when high.
Oscillator Input. A 3.579545 MHz crystal or ceramic resonator should be
connected between this pin and the OSCO pin. May be driven by an
external clock source.
4
5
6
7
VREF
CAP
RNGDI
RNGRC
O
O
I
O
8
9
10
RNGON
MODE
OSCI
O
I
I
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Publication Release Date: Sep. 27, 2005
Revision A2
W91030B
Pin Descriptions, continued
PIN
NAME
TYPE
DESCRIPTION
11
OSCO
O
Oscillator Output. A 3.579545 MHz crystal or ceramic resonator should be
connected between this pin and the OSCI pin. Should left open or to drive
another clocked device when an external clock is connected to the OSCI
pin.
Power Supply Ground.
Test pin. Must be connected to V
SS
for normal operation.
Reset or Sleep Input (Schmitt input). When high the device will be reseted
and enter a low power state by disabling the gain control op-amp, the
oscillator and other internal circuits. The function of RNGDI, RNGRC and
the RNGON pins are not affected when the device is in a sleep condition.
This pin must be set low for normal operation. The device must reseted by
micro controller or by external RC pulse after power on.
FSK Enable. Must be set high when for FSK demodulation. May be set low
to disable the FSK demodulator when FSK signal is not expected.
Data Clock for the FSK interface. In the FSK data output interface mode 0
(MODE pin low), this pin is an output with a changing FSK frequency. In
the FSK interface mode 1, this pin is an input.
Data signal for the FSK interface. Serial data output according to the FSK
frequency input in FSK data output interface mode 0 (MODE pin low). Data
is shifted out on the rising edge of DCLK in FSK data output interface mode
1. Both logic 1 for mark and logic 0 for space.
Data Ready of the FSK interface (Low active). In FSK interface mode 0
(MODE pin low), this pin identifies the 8-bit data boundary on the serial
output string. In FSK interface mode 1, this pin is used to notify the micro-
controller to extract the 8-bit data (ie. 8-bit data has been ready internally).
FSK Carrier Detect (Low active). When low, it indicates the FSK signal has
been detected.
Interrupt signal (open drain). It is used to interrupt the microcontroller when
RNGON or FDRN are low, or if ALGO is high. Remains low until all three
signals have become inactive.
Dual tone Alert signal Guard time detect Output. When high, a guard time
qualified for the dual tone alert signal has been detected.
Dual tone Alert signal Guard time Resistor. Also functions as a dual tone
alert signal detect output without guard time. An external resistor must
connected between this pin and ALGRC to implement guard time
detection.
Dual tone Alert signal Guard time RC (CMOS output and internal voltage
comparator input). An external resistor must be connected between this pin
and ALGR and an external capacitor between this pin and V
DD
to
implement guard time detection.
Power supply input.
12
13
14
V
SS
TEST
SLEEP/
RESET
I
I
I
15
16
FSKE
DCLK
I
I, O
17
DATA
O
18
FDRN
O
19
20
FCDN
INTN
O
O
21
22
ALGO
ALGR
O
O
23
ALGRC
I
24
V
DD
I
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Publication Release Date: Sep. 27, 2005
Revision A2
W91030B
5. SYSTEM DIAGRAM
The W91030B device applications include telephone systems which have caller ID features and which
can display the calling message on an LCD display. Figure 5 shows the system diagram. It illustrates
how to use the chip to connect between the tip/ring and the microcontroller in the telephone system.
The ring signal is detected by the W91030B device and then an interrupt sent to the microcontroller.
The ring detected signal will also be directed to the ringer circuit. The data can be decoded by the
microcontroller and displayed on the LCD display. The DTMF ACK signal can also be generated by
the DTMF generator if a call on waiting is performed. Other functions are the same as the telephone
set.
LCD Display
Keypads
Tip
Winbond
Caller ID
Micro
Controller
Ringer
Speaker
Ring
Line
Interface
(W91030B)
Handset
DTMF
Generator
Figure 5. System Diagram for Caller ID Application
6. BLOCK DIAGRAM
FSKE
Power down control
Input Pre-processor
FSK Demodulation Circuit
FSK Bandpass
Filter
FSK
Demodulator
FSK
Data Output
Interface
MODE
INP
INN
GCFB
VREF
CAP
SLEEP/
RESET
VDD
VSS
+
-
Anti-alias
Filter
DCLK
DATA
FDRN
FCDN
FSK Carrier
Detector
To internal
circuit
Bias Voltage
Generator
High Tone
Bandpass
Filter
To internal
circuit
Oscillator
&
Clock Driver
Low Tone
Bandpass
Filter
Power down control
Dual Tone Alert Signal Detection Circuit
High Tone
Detector
Guard
Time
Circuit
Interrupt
Generator
INTN
ALGO
ALGRC
ALGR
Low Tone
Detector
Ring Detector
OSCI OSCO
RNGDI
RNGRC
RNGON
Figure 6. The Block Diagram of W91030B
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Publication Release Date: Sep. 27, 2005
Revision A2
