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W91320LN

TONE/PULSE DIALER WITH HANDFREE LOCK AND HOLD FUNCTION

器件类别:无线/射频/通信    电信电路   

厂商名称:Winbond(华邦电子)

厂商官网:http://www.winbond.com.tw

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器件参数
参数名称
属性值
是否Rohs认证
不符合
零件包装代码
DIP
包装说明
DIP, DIP20,.3
针数
20
Reach Compliance Code
unknow
晶体频率
3.58 MHz
JESD-30 代码
R-PDIP-T20
JESD-609代码
e0
长度
20.06 mm
破损率
2:3
功能数量
1
端子数量
20
最高工作温度
70 °C
最低工作温度
-20 °C
封装主体材料
PLASTIC/EPOXY
封装代码
DIP
封装等效代码
DIP20,.3
封装形状
RECTANGULAR
封装形式
IN-LINE
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
2.5/5 V
认证状态
Not Qualified
储备
REPERTORY
座面最大高度
4.45 mm
最大压摆率
0.0006 mA
标称供电电压
2.5 V
表面贴装
NO
技术
CMOS
电信集成电路类型
TELEPHONE DIALER CIRCUIT
温度等级
COMMERCIAL
端子面层
TIN LEAD
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
7.62 mm
Base Number Matches
1
文档预览
W91320N SERIES
TONE/PULSE DIALER WITH HANDFREE
LOCK AND HOLD FUNCTIONS
GENERAL DESCRIPTION
The W91320N series are Si-gate CMOS ICs that provide the necessary signals for tone or pulse
dialing. The W91320N series provide one-key redial, handfree dialing, hold, redial, and lock
functions.
FEATURES
DTMF/pulse switchable dialer
32-digit redial memory
(*/T) keypad for long distance call operation
5
×
5 keyboard
Pulse-to-tone
Uses
Easy operation with redial, flash, pause, and */T keypads
Pause, pulse-to-tone (*/T) can be stored as a digit in memory
0 or 9 dialing inhibition pin for PABX system or long distance dialing lock out
Off-hook delay 300 mS in lock mode ( DP will keep low for 300 mS while off hook)
First key-in delay 300 mS output in lock mode
Dialing rate (10, 20 ppS ) selected by bonding option
Minimum tone output duration: 93 msec.
intertone pause: 93 msec.
Flash break time (73, 100, 300, 600 msec.) selectable by keypad, and the pause time is 1.0 sec.
power-on reset
Uses 3.579545 MHz crystal or ceramic resonator
Minimum
On-chip
Packaged in 18, 20, or 22-pin plastic DIP
The different dialers in the W91320N series are shown in the following table:
TYPE NO.
W91320N
W91321N
W91320AN
W91321AN
W91320LN
W91320ALN
REPLACEMENT
TYPE NO.
W91320
W91321
W91320A
W91321A
W91322L
W91322AL
PULSE
(ppS)
10
20
10
20
10
10
FLASH
(mS)
600/100/300/73
600/100/300/73
600/100/300/73
600/100/300/73
600/100/300/73
600/100/300/73
M/B
Pin
Pin
Pin
Pin
Pin
Pin
HANDFREE
DIALING
-
-
Yes
Yes
-
Yes
LOCK
-
-
-
-
Yes
Yes
PACKAGE
(PINS)
18
18
20
20
20
22
-1-
Publication Release Date: May 1997
Revision A2
W91320N SERIES
PIN CONFIGURATIONS
C1
C1
C2
C3
C4
H/P MUTE
V
SS
XT
XT
T/P MUTE
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
R4
R3
R2
R1
V
DD
MODE
DTMF
XT
DP/C5
HKS
T/P MUTE
HFI
C2
C3
C4
H/P MUTE
V
SS
XT
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
R4
R3
R2
R1
V
DD
MODE
DTMF
DP/C5
HKS
HFO
W91320N/W91321N
W91320AN/W91321AN
C1
C1
C2
C3
C4
LOCK
H/P MUTE
V
SS
XT
XT
T/P MUTE
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
R4
R3
R2
R1
V
DD
NC
MODE
DTMF
DP/C5
HKS
C2
C3
C4
LOCK
H/P MUTE
V
SS
XT
XT
T/P MUTE
HFI
1
2
3
4
5
6
7
8
9
10
11
22
21
20
19
18
17
16
15
14
13
12
R4
R3
R2
R1
V
DD
NC
MODE
DTMF
DP/C5
HKS
HFO
W91320LN
W91320ALN
-2-
W91320N SERIES
PIN DESCRIPTION
SYMBOL
Column-
Row
Inputs
18-PIN
1−4
&
15−18
20-PIN
1−4
&
17−20
22-PIN
1−4
&
19−22
I
I/O
FUNCTION
The keyboard inputs may be used with
either the standard 5
×
5 keyboard or
the inexpensive single contact (Form A)
keyboard. Electronic input from a
µC
can also be used.
A valid key-in is defined as a single row
being connected to a single column
XT, XT
7, 8
7, 8
(8, 9,
W91320LN
only)
8, 9
I, O
A built-in inverter provides oscillation
with an inexpensive 3.579545 MHz
crystal or ceramic resonator.
The T/P MUTE is a conventional
CMOS N-channel open drain output.
The output transistor is switched on
during dialing sequence, one-key redial
break and flash break time. Otherwise,
it is switched off.
T/P
MUTE
9
9
(10,
W91320LN
only)
10
O
MODE
13
15
(14,
W91320LN
only)
16
I
Pulling mode pin to V
SS
places the
dialer in tone mode.
Pulling mode pin to V
DD
places the
dialer in pulse mode. (10 ppS; 20 ppS
for W91321N/321AN M/B = 40:60)
Floating mode pin places the dialer in
pulse mode. (10 ppS; 20 ppS for
W91321N/321AN M/B = 33.3:66.7)
HKS
10
12
(11,
W91320LN
only)
13
I
Hook switch input.
HKS = V
DD
: On-hook state. Chip in
sleeping mode, no operation.
HKS = V
SS
: Off-hook state. Chip is
enable for normal operation.
HKS pin is pulled to V
DD
by internal
resistor.
-3-
Publication Release Date: May 1997
Revision A2
W91320N SERIES
Pin Description, continued
SYMBOL
DP / C5
18-PIN
11
20-PIN
13
(12,
W91320LN
only)
22-PIN
14
I/O
O
FUNCTION
N-channel open drain dialing pulse
output.
Flash key will cause DP to be active in
either tone mode or pulse mode.
The timing diagram for pulse mode is
shown in Figure 1(a, b, c, d).
V
DD
, V
SS
14, 6
16, 6
(16, 7
W91320LN
only)
18, 7
I
Power input pins.
H/P
MUTE
5
5
(6,
W91320LN
only)
6
O
The H/P MUTE is a conventional
inverter output. During pulse dialing,
flash break, one-key redial break, and
hold period, this output is active high;
otherwise, it remains in low state.
No connection.
NC
-
15
(W91320LN
only)
17
-
DTMF
12
14
(13,
W91320LN
only)
15
O
In pulse mode, this pin remains in low
state at all time.
In the tone mode, it will output a dual or
single tone.
Detailed timing diagram for tone mode
is shown in Figure 2(a, b, c, d).
Output Frequency
Specified
R1
R2
R3
R4
C1
C2
C3
697
770
852
941
1209
1336
1477
Actual
699
766
848
948
1216
1332
1472
Error %
+0.28
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
-4-
W91320N SERIES
Pin Description, continued
SYMBOL
HFI,
HFO
18-PIN
-
20-PIN
10, 11
(W91320AN/
321AN)
22-PIN
11, 12
I/O
I, O
FUNCTION
Handfree control pins. The handfree
control state is toggled on by a low
pulse on the HFI input pin. The status
of the handfree control state is
described in the following table:
CURRENT STATE
Hook SW.
HFO
Low
On Hook
Off Hook
On Hook
Off Hook
Off Hook
Low
High
High
High
Input
HFI
HFI
HFI
Off Hook
On Hook
On Hook
NEXT STATE
HFO
High
Low
Low
Low
Low
High
Dialing
Yes
No
Yes
Yes
No
Yes
HFI pin is pulled to V
DD
by internal
resistor.
Detailed timing diagrams are shown in
Figure 3(a, b, c).
LOCK
-
5
(6,
W91320LN
only)
5
I
The function of this terminal is to
prevent "0" dialing and "9" dialing under
PABX system long distance call control.
When the first key input after reset is 0
or 9, all key inputs, including the 0 or 9
key, become invalid and the chip
generates no output. The telephone is
reinitialized by a reset.
LOCK PIN
Floating
V
DD
V
SS
FUNCTION
Normal dialing mode
"0," "9" dialing inhibited
"0" dialing inhibited
-5-
Publication Release Date: May 1997
Revision A2
查看更多>
参数对比
与W91320LN相近的元器件有:W91320、W91320N、W91320ALN。描述及对比如下:
型号 W91320LN W91320 W91320N W91320ALN
描述 TONE/PULSE DIALER WITH HANDFREE LOCK AND HOLD FUNCTION TONE/PULSE DIALER WITH HANDFREE LOCK AND HOLD FUNCTION TONE/PULSE DIALER WITH HANDFREE LOCK AND HOLD FUNCTION TONE/PULSE DIALER WITH HANDFREE LOCK AND HOLD FUNCTION
Reach Compliance Code unknow _compli unknow unknow
晶体频率 3.58 MHz 3.58 MHz 3.58 MHz 3.58 MHz
JESD-30 代码 R-PDIP-T20 R-PDIP-T18 R-PDIP-T18 R-PDIP-T22
端子数量 20 18 18 22
最高工作温度 70 °C 70 °C 70 °C 70 °C
最低工作温度 -20 °C -20 °C -20 °C -20 °C
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 DIP DIP DIP DIP
封装等效代码 DIP20,.3 DIP18,.3 DIP18,.3 DIP22,.3
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 IN-LINE IN-LINE IN-LINE IN-LINE
电源 2.5/5 V 2.5 V 2.5/5 V 2.5/5 V
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified
最大压摆率 0.0006 mA 0.5 mA 0.0006 mA 0.0006 mA
标称供电电压 2.5 V 2.5 V 2.5 V 2.5 V
表面贴装 NO NO NO NO
技术 CMOS CMOS CMOS CMOS
温度等级 COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
端子形式 THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE
端子节距 2.54 mm 2.54 mm 2.54 mm 2.54 mm
端子位置 DUAL DUAL DUAL DUAL
是否Rohs认证 不符合 不符合 - 不符合
零件包装代码 DIP - DIP DIP
包装说明 DIP, DIP20,.3 - DIP, DIP18,.3 DIP, DIP22,.3
针数 20 - 18 22
JESD-609代码 e0 e0 - e0
破损率 2:3 - 2:3 2:3
功能数量 1 - 1 1
储备 REPERTORY - REPERTORY REPERTORY
电信集成电路类型 TELEPHONE DIALER CIRCUIT - TELEPHONE DIALER CIRCUIT TELEPHONE DIALER CIRCUIT
端子面层 TIN LEAD Tin/Lead (Sn/Pb) - TIN LEAD
Base Number Matches 1 1 - 1
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