Preliminary W91510DN SERIES
TONE/PULSE DIALER WITH RTC AND LCD
DISPLAY FUNCTIONS
GENERAL DESCRIPTION
The W91510DN series ICs are Si-gate CMOS IC that provide the signals needed for either pulse or
tone dialing. They feature a 12/16-digit LCD driver for displaying telephone numbers and calling time.
A real time clock is included to display the time of day. The W91510DN series is fabricated using
CMOS technology and thus provide good performance in low voltage, low power applications.
FEATURES
•
One by 32 digits for redial
•
Uses 5
×
6 keyboard
•
Pause, pulse-to-tone (*/T) can be stored as a digit in memory
•
Flash can be stored as a digit in memory when in store mode
•
Minimum tone output duration: 87 mS
•
Minimum intertone pause: 87 mS
•
Tone/pulse mode pin selectable
•
Make/break ratio pin selectable
•
Dialing rate: 10 ppS
•
Pause time: 3.6 Sec.
•
Flash break time (73 mS, 100 mS, 300 mS or 600 mS) selectable by keypad
•
Built-in 12 or 16-digit LCD driver
(1/4
duty, 1/3 bias) selectable by mask option
•
Built-in calling timer from [00:00] to [59:59]
•
On-chip power-on reset and clear LCD
•
Uses 3.579545 MHz TV quartz crystal or ceramic resonator
•
Uses 32768 Hz crystal as RTC frequency base
•
Packaged in 64-pin plastic QFP with RTC
•
Switchable 24-hour clock or 12-hour clock with p.m. mode by keypad
•
0 or 9 dialing inhibition pin for PABX systems or long distance dialing lock out
•
On hook debounce: 150 mS in normal mode and 20 mS in lock mode
•
Off-hook delay 300 mS in lock mode (
DP
will keep low for 300 mS while off hook except the first
off hook after power on reset that
DP
will keep high for 100 mS then go low for 200 mS)
•
First key-in delay: 300 mS in lock mode
•
Mixed dialing allowed
-1-
Publication Release Date: May 1997
Revision A2
Preliminary W91510DN SERIES
•
The functions of the different dialers in the W91560DN series are shown in following table:
TYPE NO.
W91510DNF
W91511DLNF
W91512DNF
W91513DLNF
W91510DNH*
W91512DNH*
LCD DIGITS
16
16
12
12
16
12
LOCK
−
HOLD
Yes
−
PAUSE TIME
3.6 Sec.
Yes
−
Yes
−
Yes
Yes
Yes
Yes
Yes
3.6 Sec.
* Chip form package.
PIN CONFIGURATION
W91510DNF Series
64
1
20
-2-
Preliminary W91510DN SERIES
PIN DESCRIPTION
SYMBOL
Row,
Column
Inputs
PIN NO.
18−21,
13−17
I/O
I
FUNCTION
The keyboard inputs may be used with either the standard 5
×
6
keyboard, an inexpensive single contact (form A) keyboard or
electronic input.
A valid key entry is defined by a single row being connected to
a single column.
XT1,
XT1
22, 23
I, O
A built-in inverter provides oscillation with an inexpensive
3.579545 MHz crystal or ceramic resonater.
The oscillator ceases when a keypad input is not sensed after
chip enable and dialing finished. The crystal frequency
deviation is
±0.02%.
T/P MUTE
8
O
The T/P
MUTE
is a conventional CMOS N-channel open drain
output.
The output transistor is switched on low level during dialing
sequence (both pulse and tone mode), one-key redial break
and flash break. Otherwise, it is switched off.
The H/P MUTE is a conventional CMOS inverter output, During
pulse dialing, one-key redial break, flash break and hold
functions, this pin will output an active high.
It remains in a low state at all other times.
I
The LOCK pin is used to prevent "0" or "9" dialing under PABX
system long distance call control. When the first key input after
reset is "0" or "9", all the key inputs, including "0" or "9" key,
become invalid, and the chip generates no output.
The telephone is reinitialized by a reset.
The following table describes the functions of the LOCK pin:
LOCK PIN
V
DD
Floating
V
SS
FUNCTION
"0", "9" dialing inhibited
Normal dialing
"0" dialing inhibited
H/P MUTE
9
( W91510DNF,
W91512DNF,
only )
O
LOCK
9
(W91511DLNF,
W91513DLNF
only)
HKS
24
I
Hook switch input.
HKS = V
DD
or floating: On-hook state. Chip in sleeping mode,
no operation.
HKS = V
SS
: Off-hook state. Chip enable for normal operation.
HKS pin is pulled to V
DD
by internal resistor.
-3-
Publication Release Date: May 1997
Revision A2
Preliminary W91510DN SERIES
Pin Description, continued
SYMBOL
HFI , HFO
PIN NO.
25, 10
I/O
I, O
FUNCTION
Handfree control pins. A low pulse on the HFI input pin toggles
the handfree control state.
Status of the handfree control is listed in the following table:
CURRENT STATE
Hook SW.
HFO
Low
On Hook
Off Hook
On Hook
Off Hook
Off Hook
Low
High
High
High
Input
HFI
HFI
HFI
Off Hook
On Hook
On Hook
NEXT STATE
HFO
High
Low
Low
Low
Low
High
Dialing
Yes
No
Yes
Yes
No
Yes
HFI pin is pulled to V
DD
by internal resistor.
Detailed timing diagrams are shown in Figure 4(a), 4(b).
11
O
This pin is a CMOS N-channel open drain output. Flash key will
cause
DP
to go active in either pulse mode or tone mode. In
lock mode, the
DP
keeps low for 300 mS during off-hook delay
time. The timing diagram is shown as Figure 1(a), 1(b), 1(c),
1(d).
In pulse mode, this pin remains in low state at all time.
In tone mode, it will output a dual or single tone. Detailed timing
diagram for tone mode is shown in Figure 2(a), 2(b), 2(c), 2(d).
OUTPUT FREQUENCY
Specified
R1
R2
R3
R4
C1
C2
C3
697
770
852
941
1209
1336
1477
Actual
699
766
848
948
1216
1332
1472
Error %
+0.28
- 0.52
- 0.47
+0.74
+0.57
- 0.30
- 0.34
DP
/
C6
DTMF
6
O
VLCD
CP, CN
29
31, 32
O
I
Power supply pin for LCD driver.
A 0.1
µF
capacitor is connected between VLCD and V
SS
.
CP is the voltage control capacitor positive pin.
CN is the voltage control capacitor negative pin.
A 0.1
µF
capacitor is connected between these two pins.
-4-
Preliminary W91510DN SERIES
Pin Description, continued
SYMBOL
COM1 to
COM4
SEG1 to
SEG32
XT2,
XT2
VRTC1,
VRTC2
V
DD
, V
SS
MODE
PIN NO.
33−36
37−64, 1−4
26, 27
28, 30
5, 7
12
I/O
O
O
I,
O
I
I
I
FUNCTION
COM1 to COM4 are the common signal output terminal for the
1/4 duty LCD.
SEG1 to SEG32 are the 16-digit segment signal outputs.
A quartz crystal oscillator provides an RTC frequency time base
of 32.768 KHz.
Either VRTC1 should be connected to a 1.5V battery, and
VRTC2 should be connected a capacitor 0.1
µF
to ground.
Power input pins.
Pulling mode pin to V
SS
places the dialer in tone mode.
Pulling mode pin to V
DD
places the dialer in pulse mode (10
ppS, M/B = 1/2).
Leaving mode pin floating places the dialer in pulse mode (10
ppS, M/B = 2/3).
BLOCK DIAGRAM
V
DD
V
SS
XT2
XT2
XT1
XT1
REAL TIME CLOCK
GENERATOR
SYSTEM CLOCK
GENERATOR
HKS
HFI
CONTROL
LOGIC
ROW
(R1 ~ R4)
KEYBOARD
INTERFACE
COLUMN
(C1 ~ C5)
LOCATION
LATCH
RAM
PULSE/
TONE
CONTROL
LOGIC
H/P MUTE
T/P MUTE
DP
HFO
READ/WRITE
COUNTER
LOCK
MODE
DTMF
D/A
CONVERTER
ROW & COLUMN
PROGRAMMABLE
COUNTER
DATA LATCH
& DECODER
V
LCD
V
RTC1
V
RTC2
BACKPLANE SIGNAL
GENERATOR
SEGMENT OUTPUT
DECODER
CP CN
COM1 COM2 COM3 COM4
L.C.D.
-5-
Publication Release Date: May 1997
Revision A2
