W91540N SERIES
10-MEMORY TONE/PULSE DIALER WITH SAVE,
KEYTONE, LOCK, AND HANDFREE FUNCTIONS
GENERAL DESCRIPTION
The W91540N series are tone/pulse switchable telephone dialers with 10 memories, keytone or lock
function, and handfree dialing control. These chips are fabricated using Winbond's high-performance
CMOS technology and thus offer good performance in low-voltage and low-power operations.
FEATURES
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DTMF/pulse switchable dialer
Two by 32-digit redial and save memory
Ten by 16 digit two-touch indirect repertory memory
Pulse-to-tone (*/T) keypad for long distance call operation
Cascaded dialing
Uses 5
×
5 keyboard
Easy operation with redial, flash, pause, and */T keypads
Pause, P→T (pulse-to-tone) can be stored as a digit in memory
0 or 9 dialing inhibition pin for PABX system or long distance dialing lock out
Dialing rate (10 ppS or 20 ppS) selected by bonding option
Minimum tone output duration: 93 mS (W91544AN: 87 mS)
Minimum intertone pause: 93 mS (W91544AN: 87 mS)
Pause time: 3.6 sec
300 mS off-hook delay in lock mode (
DP
remains low for 300 mS while off-hook)
Flash break time (73 mS, 100 mS, 300 mS, or 600 mS) selectable by keypad; pause time is 1.0 S
Make/break ratio (2:3 or 1:2) selectable by Mode pin
Key tone output for valid keypad entry recognition
On-chip power-on reset
Uses 3.579545 MHz crystal or ceramic resonator
Packaged in 18 or 20-pin DIP
-1-
Publication Release Date: May 1997
Revision A2
W91540N SERIES
•
The different dialers in the W91540N series are shown in the following table:
TYPE NO.
W91540N
REPLACEMENT
TYPE NO.
W91540
W91541
W91540AN
W91540A
W91541A
W91541LN
W91541ALN
W91542N
W91542AN
W91544AN
W91541L
W91541AL
W91542
W91542A
New type
10
10
20
20
10
600/300/73/100
600/300/73/100
600/300/73/100
600/300/73/100
600/300/73/100
Pin
Pin
Pin
Pin
Pin
-
-
Yes
Yes
Yes
-
Yes
-
Yes
Yes
Yes
Yes
-
-
-
18
20
18
20
20
10
600/300/73/100
Pin
Yes
Yes
-
20
PULSE
(ppS)
10
FLASH
(mS)
600/300/73/100
M/B
Pin
KEY
TONE
Yes
HANDFREE
DIALING
-
LOCK
-
PACKAGE
(PINS)
18
Note: The W91544AN is designed specifically for use in France. The pause time is not added in pulse-to-tone mode.
PIN CONFIGURATIONS
C1
C1
C2
C3
C4
KT
V
SS
XT
XT
T/P MUTE
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
R4
R3
R2
R1
V
DD
MODE
DTMF
DP/C5
HKS
C2
C3
C4
KT
V
SS
XT
XT
T/P MUTE
HFI
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
R4
R3
R2
R1
V
DD
MODE
DTMF
DP/C5
HKS
HFO
W91540N/542N
W91540AN/542AN/544AN
-2-
W91540N SERIES
Pin Configurations, continued
C1
C1
C2
C3
C4
LOCK
V
SS
XT
XT
T/P MUTE
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
R4
R3
R2
R1
V
DD
MODE
DTMF
DP/C5
HKS
C2
C3
C4
LOCK
V
SS
XT
XT
T/P MUTE
HFI
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
R4
R3
R2
R1
V
DD
MODE
DTMF
DP/C5
HKS
HFO
W91541LN
W91541ALN
PIN DESCRIPTION
SYMBOL
Column-Row
Inputs
18-PIN
1−4
&
15−18
20-PIN
1−4
&
17−20
I/O
I
FUNCTION
The keyboard input is compatible with a standard
5
×
5 keyboard, an inexpensive single contact
(Form A) keyboard, and electronic input.
In normal operation, any single button can be
pushed to produce a dual tone, pulses, or a
function. Activation of two or more buttons will
result in no response except for single tone.
I
A built-in inverter provides oscillation with an
inexpensive 3.579545 MHz crystal. The oscillator
ceases when a keypad input is not sensed. The
crystal frequency deviation is 0.02%.
Crystal oscillator output pin.
The T/P
MUTE
is a conventional CMOS N-
channel open drain output.
The output transistor is switched on low level
during dialing sequence (both pulse and tone
mode). Otherwise, it is switched off.
XT
7
7
XT
8
9
8
9
O
O
T/P
MUTE
-3-
Publication Release Date: May 1997
Revision A2
W91540N SERIES
Pin Description, continued
SYMBOL
MODE
18-PIN
13
20-PIN
15
I/O
I
FUNCTION
Pulling mode pin to V
SS
places dialer in tone
mode.
Pulling mode pin to V
DD
places dialer in pulse
mode with M/B ratio of 40:60 (10 ppS, except for
W91542N/542AN is 20 ppS).
Leaving mode pin floating places dialer in pulse
mode with M/B ratio of 33.3:66.7 (10 ppS, except
for W91542N/542AN is 20 ppS).
HKS
10
12
I
The
HKS
(hook switch) input is used to sense
whether the handset is on-hook or off-hook.
On-hook state,
HKS
= 1: chip is in sleeping
mode, no operation.
Off-hook state,
HKS
= 0: chip is enabled for
normal operation.
HKS
pin is pulled to V
DD
by an internal resistor.
KT
5
(except for
W91541LN)
5
(except for
W91541ALN)
O
The key tone output is a conventional CMOS
inverter. The key tone is generated when any
valid key is pressed; the KT pin generates a 1.2
KHz square wave at 35 mS. When no key is
pressed, the KT pin remains in low state.
The function of this terminal is to prevent "0"
dialing and "9" dialing under PABX system long
distance call control. When the first key input
after reset is 0 or 9, all key inputs, including the 0
or 9 key, become invalid and the chip generates
no output. The telephone is reinitialized by a
reset.
The function of the
LOCK
pin is shown below:
LOCK PIN
V
DD
Floating
V
SS
FUNCTION
"0", "9" dialing inhibited
Normal dialing
"0" dialing inhibited
LOCK
5
(only for
W91541LN)
5
(only for
W91541ALN)
I
DP
/
C5
11
13
O
N-channel open drain dialing pulse output.
Flash key will cause DP to be active in either
tone mode or pulse mode.
In lock mode, DP remains low for 300 mS during
off-hook delay time.
The timing diagram for pulse mode is shown in
Figure 1(a, b, c, d).
-4-
W91540N SERIES
Pin Description, continued
SYMBOL
DTMF
18-PIN
12
20-PIN
14
I/O
O
FUNCTION
During pulse dialing, this pin remains in low state
regardless of keypad input. In tone mode, it will output a
dual or single tone.
A detailed timing diagram for tone mode is shown in
Figure 2(a, b, c, d)
OUTPUT FREQUENCY
Specified
R1
R2
R3
R4
C1
C2
C3
697
770
852
941
1209
1336
1477
Actual
699
766
848
948
1216
1332
1472
Error %
+0.28
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
V
DD
, V
SS
HFI
, HFO
14, 6
-
16, 6
10, 11
I
I, O
Power input pins for the dialer chip. V
DD
is the main
power and V
SS
is the ground.
Handfree control pins. A low pulse on the
HFI
input pin
toggles the handfree control state.
Status of the handfree control is listed in the following
table:
CURRENT STATE
Hook SW.
HFO
Low
On Hook
Off Hook
On Hook
Off Hook
Off Hook
Low
High
High
High
NEXT STATE
Input
HFI
HFI
HFI
Off Hook
On Hook
On Hook
HFO
High
Low
Low
Low
Low
High
Dialing
Yes
No
Yes
Yes
No
Yes
HFI
pin is pulled to V
DD
by an internal resistor.
Detailed timing diagram is shown in Figure 3.
-5-
Publication Release Date: May 1997
Revision A2
