W925E/C240
8-BIT CID MICROCONTROLLER
Table of Contents-
1.
2.
3.
4.
5.
6.
GENERAL DESCRIPTION ......................................................................................................... 2
FEATURES ................................................................................................................................. 2
PIN CONFIGURATION ............................................................................................................... 4
PIN DESCRIPTION..................................................................................................................... 5
BLOCK DIAGRAM ...................................................................................................................... 7
FUNCTIONAL DESCRIPTION.................................................................................................... 8
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
6.14
6.15
7.
8.
Memory Organization ..................................................................................................... 9
Special Function Registers ........................................................................................... 12
Initial State of Registers................................................................................................ 32
Instruction ..................................................................................................................... 33
Power Management...................................................................................................... 37
Reset............................................................................................................................. 38
Interrupt......................................................................................................................... 38
Programmable Timers/Counters................................................................................... 41
Serial Port 1 .................................................................................................................. 45
Comparator ................................................................................................................... 47
DTMF Generator........................................................................................................... 47
FSK Generator.............................................................................................................. 48
I/O Ports........................................................................................................................ 50
Divider........................................................................................................................... 50
Calling Identity Delivery (CID)....................................................................................... 51
APPLICATION CIRCUIT........................................................................................................... 60
ELECTRICAL CHARACTERISTICS......................................................................................... 66
8.1
8.2
8.3
8.4
8.5
Absolute Maximum Ratings*......................................................................................... 66
Recommended Operating Conditions .......................................................................... 66
DC Characteristics ........................................................................................................ 67
Electrical Characteristics - Gain Control OP-Amplifier ................................................. 68
AC Characteristics ........................................................................................................ 69
9.
10.
PACKAGE DIMENSION ........................................................................................................... 72
REVISION HISTORY ................................................................................................................ 73
-1-
Publication Release Date: July 12, 2005
Revision A10
W925E/C240
1. GENERAL DESCRIPTION
The W925E/C240 is an all in one single 8-bit micro-controller with widely used Calling Identity Delivery
(CID) function. The 8-bit CPU core is based on the 8051 family; therefore, all the instructions are
compatible to the Turbo 8051 series. The CID part consisted of FSK decoder, DTMF receiver, CPE*
Alert Signal (CAS) detector and Ring detector. Also built-in DTMF generator and FSK generator with
baud rate 1200 bps (bits/sec). Using W925E/C240 can easily implement the CID adjunct box and the
feature phone or Short Message Service (SMS) phone with CID function. The main features are listed
in the next section.
2. FEATURES
•
APPLICATION:
The
SMS
phone with CID function and CID adjunct box.
•
CPU:
8-bit micro-controller is similar to the 8051 family.
−
EEPROM type(E version) operating voltage:
µC:
Depend on the operating vol. option. Either 2.4 to 3.6V or 3.0 to 5.5V for operating. If 2.4 to
3.6V be selected, the
µC
operating range is from 2.4 to 3.6V, else if 3.0 to 5.5V be selected,
the
µC
operating range is from 3.0 to 5.5V.
CID: 3.0 to 5.5V.
−
MASK type(C version) operating voltage:
µC:
2.2 to 5.5V.
CID: 3.0 to 5.5V.
•
Dual-clock operation:
−
Main oscillator: 3.58MHz crystal for CID and DTMF function. And built-in RC oscillator.
−
Sub oscillator: 32768Hz crystal.
−
Main and sub oscillators are enable/disable by bit control individually.
•
ROM:
256K bytes internal flash EEPROM/MASK ROM type.
−
Up 128K bytes for program ROM.
−
Total 256K bytes for look-up table ROM.
−
Separate 256K into 4 pages, each page is 64K addressable.
•
RAM:
−
256 bytes on chip scratch-pad RAM.
−
8K bytes on chip RAM for MOVX instruction.
•
CID
−
Compatible with Bellcore TR-NWT-000030 & SR-TSV-002476, British Telecom(BT) SIN227, U.K.
Cable Communication Association(CCA) specification.
−
FSK modulator/demodulator: for Bell 202 and ITU-T V.23 FSK with 1200-baud rate.
−
CAS detector: for dual tones of Bellcore CAS and BT Idle State and Loop State Dual Tone Alert
Signal (DTAS).
−
DTMF generator/receiver;
−
Ring detector: for line reversal for BT, ring burst for CCA or ring signal for Bellcore.
−
Two independent OP amps with adjustable gain for Tip/Ring and Telephone Hybrid connections.
-2-
W925E/C240
•
I/O:
40 I/O pins.
−
P0: Bit and byte addressable. I/O mode can be bit controlled. Open drain type.
−
P1~P3: Bit and byte addressable. Pull high and I/O mode can be bit controlled.
−
P4: Byte addressable. Pull high and I/O mode can be bit controlled.
Note: ”CPE*” Customer Premises Equipment
•
Power mode:
−
Dual-clock slow operation mode:
System is operated by the sub-oscillator (Fosc=Fs and Fm is
stopped)
−
Idle mode:
CPU hold. The clock to the CPU is halted, but the interrupt, timer and watchdog timer
block work normally but CID function is disabled.
−
Power down mode:
All activity is completely stopped and power consumption is less than 1
µA.
•
Timer:
2 13/16-bit timers, or 8-bit auto-reload timers, that are Timer0 and Timer1.
•
Watchdog timer:
WDT can be programmed by the user to serve as a system monitor.
•
Interrupt:
11 interrupt sources with two levels of priority.
−
4 interrupts from INT0, INT1, INT2 and INT3.
−
2 interrupts from Timer0, Timer1.
−
1 interrupt from Serial port.
−
1 interrupt from CID.
−
1 interrupt from 13/14-bit Divider.
−
1 interrupt from Comparator.
−
1 interrupt from Watch Dog Timer.
•
Divider:
13/14 bit divider, clock source from sub-oscillator, therefore, DIVF set every 0.25/0.5
second.
•
Comparator:
−
Comparator: 1 analog inputs from VNEG pin, 2 reference input pins, one is from VPOS pin and
another is from internal regulator output.
•
Serial port:
−
An 8-bit serial transceiver with SCLK and SDATA.
•
Package:
−
100pin LQFP: The part numbers are W925E240 & W925C240
−
Lead free 100pin LQFP: The part numbers are W925E240FG & W925G240
-3-
Publication Release Date: July 12, 2005
Revision A10
W925E/C240
3. PIN CONFIGURATION
Figure 3-1 shows the pin assignment. The package type is 100pin QFP.
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
EA/DATA
BUZ
TEST/MODE
P17
P16
P15
P14
P13
P12
P11
P10
P27
P26
P25
P24
P23
P22
P21
P20
P37
P36
P35
P34
P33
P32
P31
P30
P47
P46
P45
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
XOUT2
XIN2
VDD
RESET/VPP
XIN1
XOUT1
VSS
P00
P01
P02
P03
P04
P05
P06
P07
NC
NC
NC
NC
NC
W925E/C240
P44/VPOS
P43
P42/VNEG
P41
P40
DTMF/FSK
RNGDI
RNGRC
NC
NC
INP2
INN2
GCFB2
VAS
VAD
GCFB1
INN1
INP1
VREF
CAP
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Figure 3-1 W925E/C240 Pin Configuration
-4-
W925E/C240
4. PIN DESCRIPTION
NAME
I/O
DESCRIPTION
TEST/MODE
EA
/DATA
I/O
I, I/O
I
I
TEST pin. In E version (EEPROM type), it works as a Mode pin to select
programming mode. In C version (Mask type), this pin with internal pull-
low resistor.
Set high for normal function. In E version, it works as a Data pin. In C
version, this pin with internal pull-high resistor.
RESET pin. A low pulse causes the whole chip reset. In E version, this pin
works as a VPP pin, which is a supply programming voltage. In C version,
this pin with internal pull-high resistor.
Ring Detect Input (Schmitt trigger input). Used for ring detection and line
reversal detection. Must maintain a voltage between VAD and VAS.
Ring RC (Open drain output and Schmitt trigger input). Used to set the
time interval from the end of RNGDI pin to the inactive condition of the
RNGON pin. An external resistor must connected to VAD and a capacitor
connected to V
SS
, the time interval is the RC time constant.
Must be connected 0.1µF capacitor to V
SS
.
Reference Voltage. Nominally, VDD/2 is used to bias the input of the gain
control op-amp.
Op-amp1 Feed-back Gain Control signal. Select the input gain by
connecting this pin and the INN1 pin with feedback resistor. It is
recommended that the op-amp1 be set to unity gain.
Inverting Input of the gain control op-amp1.
Non-inverting Input of the gain control op-amp1.
Op-amp2 Feed-back Gain Control signal. Select the input gain by
connecting this pin and the INN2 pin with feedback resistor. It is
recommended that the op-amp2 be set to unity gain.
Inverting Input of the gain control op-amp2.
Non-inverting Input of the gain control op-amp2.
Analog voltage supply.
Analog ground.
Digital voltage supply.
Digital ground.
Output pin for main-oscillator. Connected to 3.58MHz crystal for CID
function.
Input pin for main-oscillator. Connected to 3.58MHz crystal for CID
function.
RESET
/VPP
RNGDI
RNGRC
CAP
VREF
GCFB1
INN1
INP1
GCFB2
INN2
INP2
VAD
VAS
V
DD
V
SS
XOUT1
XIN1
O
O
O
O
I
I
O
I
I
I
I
I
I
O
I
-5-
Publication Release Date: July 12, 2005
Revision A10
