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DESCRIPTION
The WM8750L is a low power, high quality stereo CODEC
designed for portable digital audio applications.
The device integrates complete interfaces to stereo or mono
microphones and a stereo headphone. External component
requirements are drastically reduced as no separate
microphone or headphone amplifiers are required.
Advanced on-chip digital signal processing performs graphic
equaliser, 3-D sound enhancement and automatic level
control for the microphone or line input.
The WM8750L can operate as a master or a slave, with
various master clock frequencies including 12 or 24MHz for
USB devices, or standard 256fs rates like 12.288MHz and
24.576MHz. Different audio sample rates such as 96kHz,
48kHz, 44.1kHz are generated directly from the master
clock without the need for an external PLL.
The WM8750L operates at supply voltages down to 1.8V,
although the digital core can operate at voltages down to
1.42V to save power, and the maximum for all supplies is
3.6 Volts. Different sections of the chip can also be powered
down under software control.
The WM8750L is supplied in a very small and thin 5x5mm
QFN package, ideal for use in hand-held and portable
systems.
WM8750L
Stereo CODEC for Portable Audio Applications
FEATURES
DAC SNR 98dB (‘A’ weighted), THD -84dB at 48kHz, 3.3V
ADC SNR 95dB (‘A’ weighted), THD -82dB at 48kHz, 3.3V
Complete Stereo / Mono Microphone Interface
- Programmable ALC / Noise Gate
On-chip 400mW BTL Speaker Driver (mono)
On-chip Headphone Driver
- >40mW output power on 16 / 3.3V
- THD –80dB at 20mW, SNR 90dB with 16 load
- No DC blocking capacitors required (capless mode)
Separately mixed mono output
Digital Graphic Equaliser
Low Power
- 7mW stereo playback (1.8V / 1.5V supplies)
- 14mW record & playback (1.8V / 1.5V supplies)
Low Supply Voltages
- Analogue 1.8V to 3.6V
- Digital core: 1.42V to 3.6V
- Digital I/O: 1.8V to 3.6V
256fs / 384fs or USB master clock rates: 12MHz, 24MHz
Audio sample rates: 8, 11.025, 16, 22.05, 24, 32, 44.1, 48,
88.2, 96kHz generated internally from master clock
5x5x0.9mm QFN package
APPLICATIONS
MP3 Player / Recorder
AAC/WMA/Multi-Format Player / Recorder
Minidisc Player / Recorder
Portable Digital Music Systems
BLOCK DIAGRAM
DGND
DCVDD
DBVDD
HPGND
HPVDD
M
U
X
LMIXSEL
VREF
ROUT1
W
DC MEASUREMENT
WM8750L
LEFT
LD2LO MIXER
MONOOUT
LI2LO
M
U
X
-1
OUT3
LINPUT1
LINPUT2
LINPUT3
M
U
X
LINSEL
DIFF.
INPUT
L1-R1 OR
L2-R2
RINSEL
PGA
+ MIC
BOOST
LOUT1
RD2LO
ADC
DIGITAL
FILTERS
VOLUME
DIGITAL
FILTERS
GRAPHIC
EQUALISER
BASS
BOOST
DAC
MONO
LD2MO MIXER
-6dB
RD2MO
RI2LO
LI2MO
LOUT1VOL
ANALOGUE
MONO MIX
DIGITAL
MONO MIX
MONOOUT
(phone TX)
RI2MO
LI2RO
MONOVOL
RINPUT3/
HPDETECT
RINPUT2
RINPUT1
M
U
X
PGA
+ MIC
BOOST
ADC
3D
ENHANCE
DAC
RIGHT
LD2RO MIXER
ROUT1
RD2RO
RI2RO
ROUT1VOL
DC MEASUREMENT
M
U
X
RMIXSEL
LOUT2VOL
LOUT2
L - (-R)
= L+R
ROUT2
ROUT2VOL
MICBIAS
50K
50K
AUDIO
INTERFACE
CLOCK
CIRCUITRY
CONTROL
INTERFACE
-1
ROUT2
INV
AGND
VREF
BCLK
ADCLRC
ADCDAT
DACLRC
DACDAT
MODE
SCLK
SDIN
CSB
AVDD
MCLK
VMID
WOLFSON MICROELECTRONICS plc
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Production Data, August 2012, Rev 4.4
Copyright
2012
Wolfson Microelectronics plc
WM8750L
TABLE OF CONTENTS
Production Data
DESCRIPTION ....................................................................................................... 1
FEATURES ............................................................................................................ 1
APPLICATIONS..................................................................................................... 1
BLOCK DIAGRAM ................................................................................................ 1
TABLE OF CONTENTS ......................................................................................... 2
PIN CONFIGURATION .......................................................................................... 4
ORDERING INFORMATION .................................................................................. 4
PIN DESCRIPTION ................................................................................................ 5
ABSOLUTE MAXIMUM RATINGS ........................................................................ 6
RECOMMENDED OPERATION CONDITIONS ..................................................... 6
ELECTRICAL CHARACTERISTICS ..................................................................... 7
OUTPUT PGA’S LINEARITY ........................................................................................... 9
HEADPHONE OUTPUT THD VERSUS POWER .......................................................... 10
SPEAKER THD AND NOISE VERSUS POWER ........................................................... 11
POWER CONSUMPTION .................................................................................... 12
SIGNAL TIMING REQUIREMENTS .................................................................... 13
SYSTEM CLOCK TIMING .............................................................................................. 13
AUDIO INTERFACE TIMING – MASTER MODE .......................................................... 13
AUDIO INTERFACE TIMING – SLAVE MODE .............................................................. 14
CONTROL INTERFACE TIMING – 3-WIRE MODE ....................................................... 15
CONTROL INTERFACE TIMING – 2-WIRE MODE ....................................................... 16
INTERNAL POWER ON RESET CIRCUIT .......................................................... 17
DEVICE DESCRIPTION ...................................................................................... 18
INTRODUCTION ............................................................................................................ 18
INPUT SIGNAL PATH .................................................................................................... 18
AUTOMATIC LEVEL CONTROL (ALC) ......................................................................... 25
OUTPUT SIGNAL PATH ................................................................................................ 29
ANALOGUE OUTPUTS ................................................................................................. 34
ENABLING THE OUTPUTS ........................................................................................... 36
HEADPHONE SWITCH.................................................................................................. 37
THERMAL SHUTDOWN ................................................................................................ 38
HEADPHONE OUTPUT ................................................................................................. 38
DIGITAL AUDIO INTERFACE ........................................................................................ 40
AUDIO INTERFACE CONTROL .................................................................................... 44
CLOCKING AND SAMPLE RATES................................................................................ 47
CONTROL INTERFACE................................................................................................. 49
POWER SUPPLIES ....................................................................................................... 50
POWER MANAGEMENT ............................................................................................... 51
REGISTER MAP .................................................................................................. 54
DIGITAL FILTER CHARACTERISTICS .............................................................. 55
TERMINOLOGY ............................................................................................................. 55
DAC FILTER RESPONSES ........................................................................................... 56
ADC FILTER RESPONSES ........................................................................................... 57
DE-EMPHASIS FILTER RESPONSES .......................................................................... 58
HIGHPASS FILTER ....................................................................................................... 59
APPLICATIONS INFORMATION ........................................................................ 60
RECOMMENDED EXTERNAL COMPONENTS ............................................................ 60
LINE INPUT CONFIGURATION..................................................................................... 61
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Production Data
WM8750L
MICROPHONE INPUT CONFIGURATION .................................................................... 61
MINIMISING POP NOISE AT THE ANALOGUE OUTPUTS.......................................... 62
POWER MANAGEMENT EXAMPLES ........................................................................... 62
PACKAGE DIMENSIONS .................................................................................... 63
IMPORTANT NOTICE ......................................................................................... 64
ADDRESS ...................................................................................................................... 64
REVISION HISTORY ........................................................................................... 65
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WM8750L
PIN CONFIGURATION
RINPUT1
RINPUT2
LINPUT1
LINPUT2
MODE
Production Data
SCLK
SDIN
31
32
CSB
30
29
28
27
26
25
24
23
22
21
20
19
18
17
MCLK
DCVDD
DBVDD
DGND
BCLK
DACDAT
DACLRC
ADCDAT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
LINPUT3
RINPUT3 /
HPDETECT
MICBIAS
VMID
VREF
AGND
AVDD
HPVDD
OUT3
ROUT1
LOUT1
ROUT2
ADCLRC
MONOOUT
ORDERING INFORMATION
ORDER CODE
WM8750CLSEFL
WM8750CLSEFL/R
Note:
Reel quantity = 3500
TEMPERATURE
RANGE
-25C to +85C
-25C to +85C
PACKAGE
32-lead QFN (5x5x0.9mm)
(Pb-free)
32-lead QFN (5x5x0.9mm)
(Pb-free, tape and reel)
MOISTURE
SENSITIVITY LEVEL
MSL1
MSL1
PEAK SOLDERING
TEMPERATURE
260 C
260 C
o
o
HPGND
LOUT2
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Production Data
WM8750L
PIN DESCRIPTION
PIN NO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Note:
It is recommended that the QFN ground paddle should be connected to analogue ground on the application PCB.
NAME
MCLK
DCVDD
DBVDD
DGND
BCLK
DACDAT
DACLRC
ADCDAT
ADCLRC
MONOOUT
OUT3
ROUT1
LOUT1
HPGND
ROUT2
LOUT2
HPVDD
AVDD
AGND
VREF
VMID
MICBIAS
RINPUT3 /
HPDETECT
LINPUT3
RINPUT2
LINPUT2
RINPUT1
LINPUT1
MODE
CSB
SDIN
SCLK
Supply
Supply
Supply
Digital Input / Output
Digital Input
Digital Input / Output
Digital Output
Digital Input / Output
Analogue Output
Analogue Output
Analogue Output
Analogue Output
Supply
Analogue Output
Analogue Output
Supply
Supply
Supply
Analogue Output
Analogue Output
Analogue Output
Analogue Input
Analogue Input
Analogue Input
Analogue Input
Analogue Input
Analogue Input
Digital Input
Digital Input
Digital Input/Output
Digital Input
TYPE
Digital Input
Master Clock
Digital Core Supply
Digital Buffer (I/O) Supply
Digital Ground (return path for both DCVDD and DBVDD)
Audio Interface Bit Clock
DAC Digital Audio Data
Audio Interface Left / Right Clock/Clock Out
ADC Digital Audio Data
Audio Interface Left / Right Clock
Mono Output
Analogue Output 3 (can be used as Headphone Pseudo Ground)
Right Output 1 (Line or Headphone)
Left Output 1 (Line or Headphone)
Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2)
Right Output 1 (Line or Headphone or Speaker)
Left Output 1 (Line or Headphone or Speaker)
Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2, MONOUT)
Analogue Supply
Analogue Ground (return path for AVDD)
Reference Voltage Decoupling Capacitor
Midrail Voltage Decoupling Capacitor
Microphone Bias
Right Channel Input 3 or Headphone Plug-in Detection
Left Channel Input 3
Right Channel Input 2
Left Channel Input 2
Right Channel Input 1
Left Channel Input 1
Control Interface Selection
Chip Select / Device Address Selection
Control Interface Data Input / 2-wire Acknowledge output
Control Interface Clock Input
DESCRIPTION
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