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WM8775SEDS-RV

Audio A/D Converter ICs STR ADC w/4-CH MUX 28-pin

器件类别:半导体    模拟混合信号IC   

厂商名称:Cirrus Logic(凌云半导体)

厂商官网:http://www.cirrus.com

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器件参数
参数名称
属性值
产品种类
Product Category
Audio A/D Converter ICs
制造商
Manufacturer
Cirrus Logic(凌云半导体)
RoHS
Details
系列
Packaging
Cut Tape
系列
Packaging
MouseReel
系列
Packaging
Reel
产品
Product
Audio ADCs
工厂包装数量
Factory Pack Quantity
2000
文档预览
w
DESCRIPTION
The WM8775 is a high performance, stereo audio ADC
with a 4 channel input mixer. The WM8775 is ideal for
digitising multiple analogue sources for surround sound
processing applications for home hi-fi, automotive and
other audio visual equipment.
A stereo 24-bit multi-bit sigma delta ADC is used with a
four stereo channel input selector. Each channel has
programmable gain control. Digital audio output word
lengths from 16-32 bits and sampling rates from 32kHz
to 96kHz are supported.
The audio data interface supports I S, left justified, right
justified and DSP digital audio formats.
The device is controlled via a 2 or 3 wire serial interface.
The interface provides access to all features including
channel selection, volume controls, mutes, de-emphasis
and power management facilities.
The device is available in a 28-lead SSOP package. The
WM8775 is software compatible with the WM8776.
2
WM8775
24-bit, 96kHz ADC with 4 Channel I/P Multiplexer
FEATURES
Audio Performance
102dB SNR (‘A’ weighted @ 48kHz)
-90dB THD
ADC Sampling Frequency: 32kHz – 96kHz
Four stereo ADC inputs with analogue gain adjust from
+24dB to –21dB in 0.5dB steps
Digital gain adjust from -21.5dB to -103dB.
Programmable Automatic Level Control (ALC) or Limiter on
ADC input
3-Wire SPI Compatible or 2-wire Serial Control Interface
Master or Slave Clocking Mode
Programmable Audio Data Interface Modes
I
2
S, Left, Right Justified or DSP
16/20/24/32 bit Word Lengths
2.7V to 5.5V Analogue, 2.7V to 3.6V Digital supply Operation
APPLICATIONS
Surround Sound AV Processors and Hi-Fi systems
Automotive Audio
BLOCK DIAGRAM
ADC R EF GND
AD CR EF P
VM IDAD C
AGN D
AVD D
AINOPL
AINOPR
AINVGL
AINVGR
W
WM8775
AIN1L
AIN1R
AIN2L
AIN2R
AIN3L
AIN3R
AIN4L
AIN4R
IN PU T MIXE R
AUDIO INTERFACE
STEREO
ADC
VMID
ALC
AND
DIGITAL FILTERS
MCLK
DOUT
ADCLRC
BCLK
CONTROL INTERFACE
D GN D
D VD D
CL
M ODE
CE
WOLFSON MICROELECTRONICS plc
To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews/
DI
Production Data, October 2008, Rev 4.4
Copyright
©2008
Wolfson Microelectronics plc
WM8775
TABLE OF CONTENTS
Production Data
DESCRIPTION ................................................................................................................1
FEATURES......................................................................................................................1
BLOCK DIAGRAM ..........................................................................................................1
PIN CONFIGURATION....................................................................................................3
ORDERING INFORMATION ...........................................................................................3
PIN DESCRIPTION .........................................................................................................4
ABSOLUTE MAXIMUM RATINGS..................................................................................5
RECOMMENDED OPERATING CONDITIONS ..............................................................5
ELECTRICAL CHARACTERISTICS ...............................................................................6
TERMINOLOGY ......................................................................................................................7
MASTER CLOCK TIMING...............................................................................................7
DIGITAL AUDIO INTERFACE – MASTER MODE ...................................................................8
DIGITAL AUDIO INTERFACE – SLAVE MODE ......................................................................9
3-WIRE MPU INTERFACE TIMING ......................................................................................10
2-WIRE MPU INTERFACE TIMING ......................................................................................10
INTERNAL POWER ON RESET CIRCUIT ...................................................................12
DEVICE DESCRIPTION................................................................................................14
INTRODUCTION ...................................................................................................................14
AUDIO DATA SAMPLING RATES.........................................................................................14
POWERDOWN MODES .......................................................................................................15
DIGITAL AUDIO INTERFACE ...............................................................................................16
CONTROL INTERFACE OPERATION ..................................................................................20
CONTROL INTERFACE REGISTERS ..................................................................................21
LIMITER / AUTOMATIC LEVEL CONTROL (ALC) ................................................................26
REGISTER MAP ...................................................................................................................31
DIGITAL FILTER CHARACTERISTICS ........................................................................35
ADC FILTER RESPONSES...................................................................................................35
ADC HIGH PASS FILTER .....................................................................................................35
APPLICATIONS INFORMATION ..................................................................................36
EXTERNAL CIRCUIT CONFIGURATION .............................................................................36
RECOMMENDED EXTERNAL COMPONENTS ....................................................................37
PACKAGE DIMENSIONS .............................................................................................38
IMPORTANT NOTICE ...................................................................................................39
ADDRESS: ............................................................................................................................39
w
PD, Rev 4.4, October 2008
2
Production Data
WM8775
PIN CONFIGURATION
AIN1L
BCLK
MCLK
DOUT
ADCLRC
DGND
DVDD
MODE
CE
DI
CL
NC
VMIDADC
ADCREFGND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AIN1R
AIN2L
AIN2R
AIN3L
AIN3R
AIN4L
AIN4R
AINOPL
AINVGL
AINOPR
AINVGR
AGND
AVDD
ADCREFP
ORDERING INFORMATION
DEVICE
WM8775SEDS/V
WM8775SEDS/RV
Note:
Reel quantity = 2,000
TEMPERATURE
RANGE
-25 to +85
o
C
-25 to +85 C
o
PACKAGE
28-lead SSOP
(Pb-free)
28-lead SSOP
(Pb-free, tape and reel)
MOISTURE
SENSITIVITY LEVEL
MSL2
MSL2
PEAK SOLDERING
TEMPERATURE
260°C
260°C
w
PD, Rev 4.4, October 2008
3
WM8775
PIN DESCRIPTION
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
VMIDADC
ADCREFGND
ADCREFP
AVDD
AGND
AINVGR
AINOPR
AINVGL
AINOPL
AIN4R
AIN4L
AIN3R
AIN3L
AIN2R
AIN2L
AIN1R
NAME
AIN1L
BCLK
MCLK
DOUT
ADCLRC
DGND
DVDD
MODE
CE
DI
CL
TYPE
Analogue Input
Digital input/output
Digital input
Digital output
Digital input/output
Supply
Supply
Digital Input
Digital Input
Digital input/output
Digital input
NC
Analogue Output
Supply
Analogue Output
Supply
Supply
Analogue Input
Analogue Output
Analogue Input
Analogue Output
Analogue Input
Analogue Input
Analogue Input
Analogue Input
Analogue Input
Analogue Input
Analogue Input
ADC audio interface bit clock
DESCRIPTION
Channel 1 left input multiplexor virtual ground
Production Data
Master ADC clock; 256, 384, 512 or 768fs (fs = word clock frequency)
ADC data output
ADC left/right word clock
Digital negative supply
Digital positive supply
Serial Interface Mode select
Serial Interface Latch signal
Serial interface data
Serial interface clock
No connection
ADC midrail divider decoupling pin; 10uF external decoupling
ADC negative supply and substrate connection
ADC positive reference decoupling pin; 10uF external decoupling
Analogue positive supply
Analogue negative supply and substrate connection
Right channel multiplexor virtual ground
Right channel multiplexor output
Left channel multiplexor virtual ground
Left channel multiplexor output
Channel 4 right input multiplexor virtual ground
Channel 4 left input multiplexor virtual ground
Channel 3 right input multiplexor virtual ground
Channel 3 left input multiplexor virtual ground
Channel 2 right input multiplexor virtual ground
Channel 2 left input multiplexor virtual ground
Channel 1 right input multiplexor virtual ground
Note
: Digital input pins have Schmitt trigger input buffers.
w
PD, Rev 4.4, October 2008
4
Production Data
WM8775
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at
or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical
Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30°C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
CONDITION
Digital supply voltage
Analogue supply voltage
Voltage range digital inputs (MCLK, ADCLRC, BCLK, DI, CL, CE and
MODE)
Voltage range analogue inputs
Master Clock Frequency
Operating temperature range, T
A
Junction Temperature, T
J
Storage temperature
Notes:
1.
Analogue and digital grounds must always be within 0.3V of each other.
-25°C
-25°C
-65°C
MIN
-0.3V
-0.3V
DGND -0.3V
AGND -0.3V
MAX
+3.63V
+7V
DVDD + 0.3V
AVDD +0.3V
37MHz
+85°C
+125°C
+150°C
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Digital supply range
Analogue supply range
Ground
Difference DGND to AGND
Note:
Digital supply DVDD must never be more than 0.3V greater than AVDD.
SYMBOL
DVDD
AVDD
AGND, DGND
-0.3
TEST CONDITIONS
MIN
2.7
2.7
0
0
+0.3
TYP
MAX
3.6
5.5
UNIT
V
V
V
V
w
PD, Rev 4.4, October 2008
5
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