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WM8904CGEFL/RV

Ultra Low Power CODEC for Portable Audio Applications

厂商名称：Wolfson Microelectronics plc (Cirrus Logic)

厂商官网：http://www.wolfson.co.uk

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DESCRIPTION
The WM8904 is a high performance ultra-low power stereo
CODEC optimised for portable audio applications.
The device features stereo ground-referenced headphone
amplifiers using the Wolfson ‘Class-W’ amplifier techniques -
incorporating an innovative dual-mode charge pump
architecture - to optimise efficiency and power consumption
during playback. The ground-referenced headphone and line
outputs eliminate AC coupling capacitors, and both outputs
include common mode feedback paths to reject ground
noise.
Control sequences for audio path setup can be pre-loaded
and executed by an integrated control write sequencer to
reduce software driver development and minimise pops and
clicks via Wolfson’s SilentSwitch™ technology.
The analogue input stage can be configured for single
ended or differential inputs. Up to 3 stereo microphone or
line inputs may be connected. The input impedance is
constant with PGA gain setting.
A stereo digital microphone interface is provided, with a
choice of two inputs.
A dynamic range controller provides compression and level
control to support a wide range of portable recording
applications. Anti-clip and quick release features offer good
performance in the presence of loud impulsive noises.
ReTune
Mobile 5-band parametric equaliser with fully
programmable coefficients is integrated for optimization of
speaker characteristics. Programmable dynamic range
control is also available for maximizing loudness, protecting
speakers from clipping and preventing premature shutdown
due to battery droop.
Common audio sampling frequencies are supported from a
wide range of external clocks, either directly or generated
via the FLL.
The WM8904 can operate directly from a single 1.8V
switched supply. For optimal power consumption, the digital
core can be operated from a 1.0V supply.
TM
WM8904
Ultra Low Power CODEC for Portable Audio Applications
FEATURES
3.0mW quiescent power consumption for DAC to
headphone playback
DAC SNR 96dB typical, THD -86dB typical
ADC SNR 91dB typical, THD -80dB typical
2.4mW quiescent power consumption for analogue bypass
playback
Control write sequencer for pop minimised start-up and
shutdown
Single register write for default start-up sequence
Integrated FLL provides all necessary clocks
-
-
Self-clocking modes allow processor to sleep
All standard sample rates from 8kHz to 96kHz
Stereo digital microphone input
3 single ended inputs per stereo channel
1 fully differential mic / line input per stereo channel
Digital Dynamic Range Controller (compressor / limiter)
Digital sidetone mixing
Ground-referenced headphone driver
Ground-referenced line outputs
32-pin QFN package (4 x 4mm, 0.4mm pitch)
36-ball WLCSP package (2.6 x 2.5mm, 6 x 6 ball grid,
0.4mm pitch)
APPLICATIONS
Portable multimedia players
Multimedia handsets
Handheld gaming
Wireless headsets
Mobile internet devices
Netbooks
WOLFSON MICROELECTRONICS plc
To receive regular email updates, sign up
at
http://www.wolfsonmicro.com/enews
Pre-Production, September 2012, Rev 3.3
Copyright
2012
Wolfson Microelectronics plc
Pre-Production
PP, Rev 3.3, September 2012
2.2µF
100nF
100nF
4.7µF
4.7µF
100nF 20Ω
100nF 20Ω
2.2µF
100nF 20Ω
2.2µF
100nF 20Ω
CPVDD
CPCB
CPCA
DAC R
DAC L
BYPASS R
BYPASS L
CPGND
GPIO3*
GPIO2*
IRQ/GPIO1
MCLK
DGND
DBVDD
INTERPOLATION FILTERS
DCVDD
DACDAT
LRCLK
ADCDAT
BCLK / GPIO4
DECIMATION FILTERS
SDA
SCLK
AGND
BLOCK DIAGRAM
VMIDC
100nF
4.7µF
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AVDD
WM8904
2
Pre-Production
WM8904
TABLE OF CONTENTS
DESCRIPTION ....................................................................................................... 1
 
FEATURES ............................................................................................................ 1
 
APPLICATIONS..................................................................................................... 1
 
BLOCK DIAGRAM ................................................................................................ 2
 
TABLE OF CONTENTS ......................................................................................... 3
 
AUDIO SIGNAL PATHS DIAGRAM ...................................................................... 6
 
PIN CONFIGURATION .......................................................................................... 7
 
ORDERING INFORMATION .................................................................................. 8
 
PIN DESCRIPTION ................................................................................................ 9
 
ABSOLUTE MAXIMUM RATINGS ...................................................................... 10
 
RECOMMENDED OPERATING CONDITIONS ................................................... 10
 
ELECTRICAL CHARACTERISTICS ................................................................... 11
 
TERMINOLOGY ............................................................................................................ 11 
COMMON TEST CONDITIONS .................................................................................... 11 
INPUT SIGNAL PATH ................................................................................................... 12 
OUTPUT SIGNAL PATH ............................................................................................... 16 
BYPASS PATH .............................................................................................................. 18 
CHARGE PUMP ............................................................................................................ 18 
FLL ................................................................................................................................ 18 
OTHER PARAMETERS ................................................................................................ 19 
POWER CONSUMPTION .................................................................................... 21
 
COMMON TEST CONDITIONS .................................................................................... 21 
POWER CONSUMPTION MEASUREMENTS .............................................................. 21 
SIGNAL TIMING REQUIREMENTS .................................................................... 25
 
COMMON TEST CONDITIONS .................................................................................... 25 
MASTER CLOCK .......................................................................................................... 25 
AUDIO INTERFACE TIMING ........................................................................................ 26 
MASTER MODE ............................................................................................................................................................ 26
 
SLAVE MODE................................................................................................................................................................ 27
 
TDM MODE ................................................................................................................................................................... 28
 
CONTROL INTERFACE TIMING .................................................................................. 29 
DIGITAL FILTER CHARACTERISTICS .............................................................. 30
 
ADC FILTER RESPONSES .......................................................................................... 31 
ADC HIGH PASS FILTER RESPONSES ...................................................................... 31 
DAC FILTER RESPONSES .......................................................................................... 32 
DE-EMPHASIS FILTER RESPONSES ......................................................................... 33 
DEVICE DESCRIPTION ...................................................................................... 34
 
INTRODUCTION ........................................................................................................... 34 
ANALOGUE INPUT SIGNAL PATH .............................................................................. 35 
INPUT PGA ENABLE .................................................................................................................................................... 36
 
INPUT PGA CONFIGURATION..................................................................................................................................... 36
 
SINGLE-ENDED INPUT ................................................................................................................................................ 38
 
DIFFERENTIAL LINE INPUT ......................................................................................................................................... 38
 
DIFFERENTIAL MICROPHONE INPUT ........................................................................................................................ 39
 
INPUT PGA GAIN CONTROL ....................................................................................................................................... 39
 
INPUT PGA COMMON MODE AMPLIFIER .................................................................................................................. 41
 
ELECTRET CONDENSER MICROPHONE INTERFACE ............................................. 42 
MICBIAS CONTROL ...................................................................................................................................................... 42
 
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PP, Rev 3.3, September 2012
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WM8904
Pre-Production
MICBIAS CURRENT DETECT ...................................................................................................................................... 43
 
MICBIAS CURRENT DETECT FILTERING .................................................................................................................. 44
 
MICROPHONE HOOK SWITCH DETECTION .............................................................................................................. 46
 
DIGITAL MICROPHONE INTERFACE .......................................................................... 47 
ANALOGUE-TO-DIGITAL CONVERTER (ADC) ........................................................... 49 
ADC DIGITAL VOLUME CONTROL .............................................................................................................................. 49
 
HIGH PASS FILTER ...................................................................................................................................................... 51
 
ADC OVERSAMPLING RATIO (OSR) .......................................................................................................................... 52
 
DYNAMIC RANGE CONTROL (DRC) ........................................................................... 53 
COMPRESSION/LIMITING CAPABILITIES .................................................................................................................. 53
 
GAIN LIMITS .................................................................................................................................................................. 55
 
DYNAMIC CHARACTERISTICS ................................................................................................................................... 55
 
ANTI-CLIP CONTROL ................................................................................................................................................... 56
 
QUICK RELEASE CONTROL ....................................................................................................................................... 57
 
GAIN SMOOTHING ....................................................................................................................................................... 57
 
INITIALISATION ............................................................................................................................................................ 58
 
RETUNE
TM
MOBILE PARAMETRIC EQUALIZER (EQ) ................................................ 59 
DEFAULT MODE (5-BAND PARAMETRIC EQ) ........................................................................................................... 59
 
TM
RETUNE MOBILE MODE........................................................................................................................................... 60
 
EQ FILTER CHARACTERISTICS ................................................................................................................................. 60
 
DIGITAL MIXING ........................................................................................................... 62 
DIGITAL MIXING PATHS .............................................................................................................................................. 62
 
DAC INTERFACE VOLUME BOOST ............................................................................................................................ 64
 
DIGITAL SIDETONE ...................................................................................................................................................... 64
 
DIGITAL-TO-ANALOGUE CONVERTER (DAC) ........................................................... 66 
DAC DIGITAL VOLUME CONTROL .............................................................................................................................. 66
 
DAC SOFT MUTE AND SOFT UN-MUTE ..................................................................................................................... 68
 
DAC MONO MIX ............................................................................................................................................................ 69
 
DAC DE-EMPHASIS...................................................................................................................................................... 69
 
DAC SLOPING STOPBAND FILTER ............................................................................................................................ 70
 
DAC OVERSAMPLING RATIO (OSR) .......................................................................................................................... 70
 
OUTPUT SIGNAL PATH ............................................................................................... 71 
OUTPUT SIGNAL PATHS ENABLE .............................................................................................................................. 72
 
HEADPHONE / LINE OUTPUT SIGNAL PATHS ENABLE ........................................................................................... 72
 
OUTPUT MUX CONTROL ............................................................................................................................................. 76
 
OUTPUT VOLUME CONTROL...................................................................................................................................... 76
 
ANALOGUE OUTPUTS ................................................................................................. 79 
HEADPHONE OUTPUTS – HPOUTL AND HPOUTR ................................................................................................... 79
 
LINE OUTPUTS – LINEOUTL AND LINEOUTR............................................................................................................ 79
 
EXTERNAL COMPONENTS FOR GROUND REFERENCED OUTPUTS .................................................................... 80
 
REFERENCE VOLTAGES AND MASTER BIAS........................................................... 81 
ANALOGUE REFERENCE AND MASTER BIAS .......................................................................................................... 81
 
LOW POWER PLAYBACK MODE ................................................................................................................................ 82
 
POP SUPPRESSION CONTROL .................................................................................. 83 
DISABLED INPUT CONTROL ....................................................................................................................................... 83
 
CHARGE PUMP ............................................................................................................ 84 
DC SERVO .................................................................................................................... 85 
DC SERVO ENABLE AND START-UP ......................................................................................................................... 85
 
DC SERVO ACTIVE MODES ........................................................................................................................................ 88
 
DC SERVO READBACK ............................................................................................................................................... 90
 
DIGITAL AUDIO INTERFACE ....................................................................................... 90 
MASTER AND SLAVE MODE OPERATION ................................................................................................................. 91
 
OPERATION WITH TDM ............................................................................................................................................... 91
 
BCLK FREQUENCY ...................................................................................................................................................... 92
 
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PP, Rev 3.3, September 2012
4
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WM8904
AUDIO DATA FORMATS (NORMAL MODE) ................................................................................................................ 92
 
DIGITAL AUDIO INTERFACE CONTROL..................................................................... 97 
AUDIO INTERFACE OUTPUT TRI-STATE ................................................................................................................... 98
 
BCLK AND LRCLK CONTROL ...................................................................................................................................... 98
 
COMPANDING .............................................................................................................................................................. 99
 
LOOPBACK ................................................................................................................................................................. 101
 
DIGITAL PULL-UP AND PULL-DOWN ........................................................................................................................ 101
 
CLOCKING AND SAMPLE RATES ............................................................................. 102 
SYSCLK CONTROL .................................................................................................................................................... 103
 
CONTROL INTERFACE CLOCKING .......................................................................................................................... 104
 
CLOCKING CONFIGURATION ................................................................................................................................... 104
 
ADC / DAC CLOCK CONTROL ................................................................................................................................... 105
 
OPCLK CONTROL ...................................................................................................................................................... 106
 
TOCLK CONTROL ...................................................................................................................................................... 106
 
ADC / DAC OPERATION AT 88.2K / 96K ................................................................................................................... 107
 
FREQUENCY LOCKED LOOP (FLL) .......................................................................... 108 
FREE-RUNNING FLL CLOCK ..................................................................................................................................... 112
 
GPIO OUTPUTS FROM FLL ....................................................................................................................................... 113
 
EXAMPLE FLL CALCULATION ................................................................................................................................... 113
 
EXAMPLE FLL SETTINGS .......................................................................................................................................... 114
 
GENERAL PURPOSE INPUT/OUTPUT (GPIO) ......................................................... 115 
IRQ/GPIO1 ................................................................................................................................................................... 115
 
GPIO2 .......................................................................................................................................................................... 116
 
GPIO3 .......................................................................................................................................................................... 116
 
BCLK/GPIO4 ................................................................................................................................................................ 117
 
INTERRUPTS .............................................................................................................. 118 
USING IN1L AND IN1R AS INTERRUPT INPUTS ...................................................................................................... 122
 
CONTROL INTERFACE .............................................................................................. 123 
CONTROL WRITE SEQUENCER ............................................................................... 125 
INITIATING A SEQUENCE .......................................................................................................................................... 125
 
PROGRAMMING A SEQUENCE ................................................................................................................................ 126
 
DEFAULT SEQUENCES ............................................................................................................................................. 129
 
START-UP SEQUENCE .............................................................................................................................................. 129
 
SHUTDOWN SEQUENCE ........................................................................................................................................... 131
 
POWER-ON RESET.................................................................................................... 133 
QUICK START-UP AND SHUTDOWN ........................................................................ 135 
QUICK START-UP (DEFAULT SEQUENCE) .............................................................................................................. 135
 
FAST START-UP FROM STANDBY ........................................................................................................................... 135
 
QUICK SHUTDOWN (DEFAULT SEQUENCE)........................................................................................................... 136
 
SOFTWARE RESET AND CHIP ID ............................................................................. 137 
REGISTER MAP ................................................................................................ 138
 
REGISTER BITS BY ADDRESS ................................................................................. 142 
APPLICATIONS INFORMATION ...................................................................... 181
 
RECOMMENDED EXTERNAL COMPONENTS ......................................................... 181 
MIC DETECTION SEQUENCE USING MICBIAS CURRENT ..................................... 183 
PACKAGE DIMENSIONS .................................................................................. 185
 
IMPORTANT NOTICE ....................................................................................... 187
 
ADDRESS ................................................................................................................... 187 
REVISION HISTORY ......................................................................................... 188
 
AUDIO DATA FORMATS (TDM MODE)........................................................................................................................ 95
 
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参数对比
与WM8904CGEFL/RV相近的元器件有：WM8904、WM8904ECS/R。描述及对比如下：
型号 WM8904CGEFL/RV WM8904 WM8904ECS/R
描述 Ultra Low Power CODEC for Portable Audio Applications Ultra Low Power CODEC for Portable Audio Applications Ultra Low Power CODEC for Portable Audio Applications
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