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WS512K32NBV-17H2CE

SRAM Module, 512KX32, 17ns, BICMOS, CPGA66, 1.385 X 1.385 INCH, HERMETIC SEALED, CERAMIC, HIP-66

器件类别:存储    存储   

厂商名称:Microsemi

厂商官网:https://www.microsemi.com

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器件参数
参数名称
属性值
是否Rohs认证
不符合
包装说明
1.385 X 1.385 INCH, HERMETIC SEALED, CERAMIC, HIP-66
Reach Compliance Code
unknown
最长访问时间
17 ns
其他特性
ALSO CONFIGURABLE AS 2M X 8
备用内存宽度
16
I/O 类型
COMMON
JESD-30 代码
S-CPGA-P66
JESD-609代码
e4
长度
35.2 mm
内存密度
16777216 bit
内存集成电路类型
SRAM MODULE
内存宽度
32
功能数量
1
端子数量
66
字数
524288 words
字数代码
512000
工作模式
ASYNCHRONOUS
最高工作温度
70 °C
最低工作温度
组织
512KX32
输出特性
3-STATE
封装主体材料
CERAMIC, METAL-SEALED COFIRED
封装代码
PGA
封装等效代码
PGA66,11X11
封装形状
SQUARE
封装形式
GRID ARRAY
并行/串行
PARALLEL
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
3.3 V
认证状态
Not Qualified
座面最大高度
5.7 mm
最大压摆率
0.48 mA
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
3 V
标称供电电压 (Vsup)
3.3 V
表面贴装
NO
技术
BICMOS
温度等级
COMMERCIAL
端子面层
GOLD
端子形式
PIN/PEG
端子节距
2.54 mm
端子位置
PERPENDICULAR
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
35.2 mm
文档预览
White Electronic Designs
512Kx32 3.3V SRAM MODULE
FEATURES
Access Times of 15*, 17, 20ns
Low Voltage Operation
Packaging
• 66-pin, PGA Type, 1.385 inch square Hermetic
Ceramic HIP (Package 402)
• 68 lead, Hermetic CQFP (G2), 22mm (0.880
inch) square (Package 500). Designed to fit
JEDEC 68 lead 0.990" CQFJ footprint
Organized as 512Kx32; User Configurable as
1Mx16 or 2Mx8
Radiation Tolerant with Epitaxial Layer Die
Commercial and Industrial Temperature Ranges
WS512K32BV-XXXE
*ADVANCED
3.3V Power Supply
BiCMOS
TTL Compatible Inputs and Outputs
Built-in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation
Weight
• WS512K32BV-XG2XE - 8 grams typical
• WS512K32NBV-XH2XE - 13 grams typical
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
PIN CONFIGURATION FOR WS512K32NBV-XH2XE
TOP VIEW
1
I/O
8
I/O
9
I/O
10
A
13
A
14
A
15
A
16
A
17
I/O
0
I/O
1
I/O
2
11
22
12
WE#
2
CS#
2
GND
I/O
11
A
10
A
11
A
12
V
CC
CS#
1
NC
I/O
3
33
23
I/O
15
I/O
14
I/O
13
I/O
12
OE#
A
18
WE#
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
6
A
7
34
V
CC
45
N
OT
CO
RE
ME
CS#
4
WE#
4
I/O
27
A
3
A
4
A
5
WE#
3
CS#
3
GND
I/O
19
44
ED
ND
56
I/O
31
I/O
30
I/O
29
I/O
28
A
0
A
1
A
2
I/O
23
I/O
22
I/O
21
I/O
20
OR
F
EW
N
I/O0-31
A0-18
CS#1-4
OE#
V
CC
GND
NC
ES
D
NS
IG
PIN DESCRIPTION
Data Inputs/Outputs
Address Inputs
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
WE#1-4 Write Enables
NC
A
8
A
9
I/O
16
I/O
17
I/O
18
BLOCK DIAGRAM
WE#1 CS#1
OE#
A0-18
512K x 8
512K x 8
WE#2 CS#2
WE#3 CS#3
WE#4 CS#4
512K x 8
512K x 8
55
66
8
8
8
8
I/O0-7
I/O8-15
I/O16-23
I/O24-31
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
December, 1999
Rev. 2
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
WS512K32BV-XXXE
PIN CONFIGURATION FOR WS512K32BV-XG2XE
TOP VIEW
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS#
3
GND
CS#
4
WE#
1
A
6
A
7
A
8
A
9
A
10
V
CC
PIN DESCRIPTION
I/O0-31
A0-18
WE#1-4
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
CS#1-4
OE#
V
CC
GND
NC
BLOCK DIAGRAM
WE#1 CS#1
OE#
A0-18
512K x 8
512K x 8
WE#2 CS#2
WE#3 CS#3
WE#4 CS#4
512K x 8
512K x 8
CS#
1
OE#
CS#
2
A
17
WE#
2
WE#
3
WE#
4
V
CC
A
18
A
12
A
13
A
14
A
15
A
16
A
11
NC
NC
8
8
8
8
I/O0-7
I/O8-15
I/O16-23
I/O24-31
The WEDC 68 lead G2 CQFP fills the same fit and
function as the JEDEC 68 lead CQFJ or 68 PLCC. But
the G2 has the TCE and lead inspection advantage of
the CQFP form.
0.940"
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
December, 1999
Rev. 2
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
Parameter
Operating Temperature
Storage Temperature
Signal Voltage Relative to GND
Junction Temperature
Supply Voltage
Symbol
T
A
T
STG
V
G
T
J
V
CC
-0.5
Min
-40
-65
-0.5
Max
+85
+150
4.6
150
4.6
Unit
°C
°C
V
°C
V
CS#
H
L
L
L
OE#
X
L
X
H
X
H
L
H
WS512K32BV-XXXE
TRUTH TABLE
WE#
Mode
Standby
Read
Write
Out Disable
Data I/O
High Z
Data Out
Data In
High Z
Power
Standby
Active
Active
Active
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Symbol
V
CC
V
IH
V
IL
Min
3.0
2.2
-0.3
Max
3.6
V
CC
+ 0.3
+0.8
Unit
V
V
V
Parameter
OE# capacitance
WE#1-4 capacitance
HIP (PGA)
CQFP G2
CS#1-4 capacitance
Data I/O capacitance
CAPACITANCE
(T
A
= +25°C)
Symbol Conditions
C
OE
C
WE
Max Unit
pF
pF
V
IN
= 0 V, f = 1.0 MHz 50
V
IN
= 0 V, f = 1.0 MHz 20
20
C
CS
C
I/O
V
IN
= 0 V, f = 1.0 MHz 20
V
I/O
= 0 V, f = 1.0 MHz 20
pF
pF
pF
Address input capacitance C
AD
V
IN
= 0 V, f = 1.0 MHz 50
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
(V
CC
= 3.3V ± 0.3V, V
SS
= 0V, T
A
= -40°C to +85°C)
Parameter
Input Leakage Current
Output Leakage Current
Operating Supply Current (x 32 Mode)
Standby Current
Output Low Voltage
Output High Voltage
NOTE: DC test conditions: V
IH
= V
CC
-0.3V, V
IL
= 0.3V
Sym
I
LI
I
LO
I
CC
x 32
I
SB
V
OL
V
OH
Conditions
V
IN
= GND to V
CC
CS# = V
IH
, OE# = V
IH
, V
OUT
= GND to VCC
CS# = V
IL
, OE# = V
IH
, f = 5MHz, V
CC
= 3.6V
CS# = V
IH
, OE# = V
IH
, f = 5MHz, V
CC
= 3.6V
I
OL
= 8mA
I
OH
= -4.0mA
2.4
Min
Max
10
10
480
110
0.4
Units
µA
µA
mA
mA
V
V
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
December, 1999
Rev. 2
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
AC CHARACTERISTICS
(V
CC
= 3.3V, T
A
= -40°C to +85°C)
Parameter
Read Cycle
Read Cycle Time
Address Access Time
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
1. This parameter is guaranteed by design but not tested.
*Advanced information.
Symbol
t
RC
t
AA
t
OH
t
ACS
t
OE
t
CLZ
1
t
OLZ
1
t
CHZ
1
1
WS512K32BV-XXXE
-15*
Min
15
15
0
15
7
2
0
7
7
2
0
0
Max
Min
17
-17
Max
17
0
17
8
2
0
8
8
Min
20
-20
Max
20
20
10
Units
ns
ns
ns
ns
ns
ns
ns
10
10
ns
ns
t
OHZ
AC CHARACTERISTICS
(V
CC
= 3.3V, T
A
= -40°C to +85°C)
Parameter
Write Cycle
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
Output Active from End of Write
Write Enable to Output in High Z
Data Hold Time
1. This parameter is guaranteed by design but not tested.
*Advanced information.
Symbol
t
WC
t
CW
t
AW
t
DW
t
WP
t
AS
t
AH
t
OW
1
-15*
Min
15
10
10
8
12
0
0
2
8
0
0
Max
Min
17
12
12
9
14
0
0
3
-17
Max
Min
20
14
14
10
14
0
0
3
8
0
-20
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
t
WHZ
1
t
DH
9
ns
ns
AC TEST CIRCUIT
Parameter
I
OL
Current Source
AC TEST CONDITIONS
Typ
V
IL
= 0, V
IH
= 2.5
5
1.5
1.5
Unit
V
ns
V
V
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
D.U.T.
C
eff
= 50 pf
V
Z
1.5V
(Bipolar Supply)
I
OH
Current Source
NOTES:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z0 = 75 ½.
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
December, 1999
Rev. 2
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
TIMING WAVEFORM - READ CYCLE
WS512K32BV-XXXE
t
RC
ADDRESS
t
AA
t
RC
ADDRESS
t
AA
t
OH
OE#
CS#
t
ACS
t
CLZ
t
CHZ
DATA I/O
PREVIOUS DATA VALID
DATA VALID
DATA I/O
t
OE
t
OLZ
t
OHZ
DATA VALID
READ CYCLE 1 (CS# = OE# = V
IL
, WE# = V
IH
)
HIGH IMPEDANCE
READ CYCLE 2 (WE# = V
IH
)
WRITE CYCLE - WE# CONTROLLED
t
WC
ADDRESS
t
AW
t
CW
CS#
t
AS
WE#
t
WHZ
DATA I/O
t
DW
DATA VALID
WRITE CYCLE 1, WE# CONTROLLED
t
WP
t
OW
t
DH
t
AH
WRITE CYCLE - CS# CONTROLLED
t
WC
ADDRESS
t
AW
t
AS
CS#
t
WP
WE#
t
DW
DATA I/O
DATA VALID
WRITE CYCLE 2, CS# CONTROLLED
t
DH
t
CW
t
AH
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
December, 1999
Rev. 2
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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