Clock OSC
SG7050CAN
SG7050CAN 29.491200 MHz TJGA
Product name
Product Number / Ordering code
X1G0044810056xx
Please refer to the 8.Packing information about xx (last 2 digits)
Output waveform CMOS
Pb free / Complies with EU RoHS directive
Reference weight Typ. 147 mg
1.Absolute maximum ratings
Parameter
Symbol
Maximum supply voltage
Storage temperature
Input voltage
Min.
-0.3
-40
-0.3
Typ.
-
-
-
Max.
+4
+125
Vcc+0.3
Unit
V
ºC
V
Conditions / Remarks
-
Storage as single product
ST terminal
Vcc-GND
T_stg
Vin
2.Specifications(characteristics)
Parameter
Symbol
Output frequency
Supply voltage
Operating temperature
Frequency tolerance
Current consumption
Stand-by current
Disable current
Symmetry
Output voltage
Output load condition
Input voltage
Min.
1.6
-40
-50
-
-
-
45
Vcc-0.4
-
-
0.8Vcc
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-3
-
Typ.
29.491200
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
2.4
2.3
20
2.5
0.34
-
-94
-123
-145
-155
-158
-159
-
-
Max.
3.63
+85
50
2.2
2.7
-
55
-
0.4
15
-
0.2Vcc
3.5
3.5
3
-
-
-
-
-
-
-
-
-
-
-
-
-
3
-
Unit
MHz
V
ºC
x10
-6
mA
µA
mA
%
Conditions / Remarks
-
-
T_use
No load condition Vcc = 3.3V
Vcc = 3.3V , ST = GND
-
50% Vcc Level L_CMOS=<15pF
-
-
f0
Vcc
T_use
f_tol
Icc
I_std
I_dis
SYM
V
OH
V
OL
L_CMOS
V
IH
V
IL
t
r
tf
t_str
t
DJ
t
RJ
t
RMS
t
p-p
t
acc
pF
CMOS Load
ST terminal
ST terminal
Vcc1.8V±10% : 0.2Vcc to 0.8Vcc Level,
L_CMOS=15pF
Vcc1.8V±10% : 0.2Vcc to 0.8Vcc Level,
L_CMOS=15pF
t = 0 at 0.9Vcc
Deterministic Jitter Vcc=3.3V
Random Jitter Vcc=3.3V
δ(RMS of total distribution) Vcc=3.3V
Peak to Peak Vcc=3.3V
Accumulated Jitter(δ) n=2 to 50000
cycles
Off set Frequency: 12kHz to 20MHz, Vcc=3.3V
Rise time
Fall time
Start-up time
Jitter
ns
ns
ms
ps
ps
ps
ps
ps
ps
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
x10
-6
Phase jitter
Phase noise
t
PJ
L(f)
-
Off set 10Hz Vcc=3.3V
Off set 100Hz Vcc=3.3V
Off set 1kHz Vcc=3.3V
Off set 10kHz Vcc=3.3V
Off set 100kHz Vcc=3.3V
Off set 1MHz Vcc=3.3V
@+25ºC first year
-
Frequency aging
f_age
1 Page
3.Timing chart
V
CC
80 %V
CC
tr
tf
50 %V
CC
20 %V
CC
GND
tw
t
4.Test circuit
1) Waveform observation
V
CC
ST
swich
by-pass
capacitor
supply
GND
or
OE
Test Point
OUT
L_CMOS
2) Current consumption
swich
ST
V
CC
A
or
OE
by-pass
capacitor
supply
GND
OUT
Test
Point
*Current consumption under the
disable function should be
= GND.
3) Condition
(1) Oscilloscope
· Band width should be minimum 5 times higher (wider) than measurement frequency.
· Probe earth should be placed closely from test point and lead length should be as short as possible
* Recommendable to use miniature socket. (Don’t use earth lead.)
(2) L_CMOS also includes probe capacitance.
(3) By-pass capacitor (0.01 µF to 0.1 µF) is placed closely between VCC and GND.
(4) Use the current meter whose internal impedance value is small.
(5) Power supply
· Start up time (0 %VCC to 90 %VCC) of power source should be more than 150 µs.
· Impedance of power supply should be as lowest as possible.
2 Page
5.External dimensions
7.0±0.2
#4
5.0±0.2
(Unit: mm)
6.Footprint(Recommended)
#4
C (ex. 0.01 µF)
C
1.8
#3
(Unit: mm)
#3
E 25.000
CAN395K
1.3±0.2
#1
2.0
#1
5.08
#2
#2
Resist
1.4
C0.5
5.08
Note.
OE pin = "H" or "open" : Specified frequency output.
OE pin = "L" : Output is high impedance.
ST pin = "H" or "open" : Specified frequency output.
ST pin = "L" : Output is high impedance、oscillation stops.
7.Reflow profile
Reflow condition (Follow of JEDEC STD-020D.1)
Temperature [ ºC]
300
TP:
+260ºC OVER
1.1
+255ºC
250
TL:
200
Ts max:
+217ºC
+200ºC
Ramp-up rate
+3 ºC/s Max.
tp: at least 30 s
tL
60 s to 150 s
( +217 ºC over )
Ramp-down rate
-6 ºC/s Max.
150
Ts min:
+150
ºC
ts
60 s to 120 s
( +150ºC to +200ºC)
100
50
Time: +25 ºC to Peak
0
60
120
180
240
300
360
420
480
540
600
660
720
Time [ s ]
780
8.Packing information
[ 1 ]Product number last 2 digits code(xx) description
The recommended code is "00"
Code
13
00
Condition
500pcs / Reel
1000pcs / Reel
X1G0044810056xx
Code
01
11
12
Condition
Any Q'ty vinyl bag(Tape cut)
Any Q'ty / Reel
250pcs / Reel
3 Page
4.2
[ 2 ] Taping specification
Subject to EIA-481 & IEC-60286
(1) Tape dimensions
Material
of the Carrier Tape : PS
Material
of the Top Tape : PET+PE
Unit: mm
Ａ
Ｂ
User direction of feed
Carrier tape
Ｄ
EPSON
EPSON
Ｅ
Top tape
Ｃ
Symbol
Value
A
φ1.5
B
4
C
8
D
9.25
E
16
F
2.3
Ｆ
(2) Reel dimensions
Center material
: PS
Material of the Reel : PS
4 Page
9.Notice
· This material is subject to change without notice.
· Any part of this material may not be reproduced or duplicated in any form or any means without the written
permission of Seiko Epson.
· The information about applied data,circuitry, software, usage, etc. written in this material is intended for
reference only.
Seiko Epson does not assume any liability for the occurrence of customer damage or infringing on any patent
or copyright of a third party.
This material does not authorize the licensing for any patent or intellectual copyrights.
· When exporting the products or technology described in this material, you should comply with the applicable
export control laws and regulations and follow the procedures required by such laws and regulations.
· You are requested not to use the products (and any technical information furnished, if any) for the development
and/or manufacture of weapon of mass destruction or for other military purposes. You are also requested that
you
would not make the products available to any third party who may use the products for such prohibited
purposes.
· These products are intended for general use in electronic equipment. When using them in specific applications
that require
extremely high reliability, such as the applications stated below, you must obtain permission from Seiko Epson
in advance.
/ Space equipment (artificial satellites, rockets, etc.)
/ Transportation vehicles and related (automobiles, aircraft, trains, vessels, etc.)
/ Medical instruments to sustain life
/ Submarine transmitters
/ Power stations and related
/ Fire work equipment and security equipment
/ Traffic control equipment
/ And others requiring equivalent reliability.
10.Contact us
www5.epsondevice.com/en/contact/
5 Page
FPGA/CPLD
