首页 > 器件类别 > 模拟混合信号IC > 转换器

X9C503PZ

Digital Potentiometer ICs 50K EEPOTTM POT CMOS 8LD

器件类别:模拟混合信号IC    转换器   

厂商名称:Renesas(瑞萨电子)

厂商官网:https://www.renesas.com/

下载文档
X9C503PZ 在线购买

供应商:

器件:X9C503PZ

价格:-

最低购买:-

库存:点击查看

点击购买

器件参数
参数名称
属性值
Brand Name
Intersil
厂商名称
Renesas(瑞萨电子)
零件包装代码
PDIP, SOIC
包装说明
DIP, DIP8,.3
针数
8, 8
Reach Compliance Code
compliant
ECCN代码
EAR99
Factory Lead Time
1 week
Samacsys Description
X9C503PZ, Digital Potentiometer 50kΩ 100-Position Linear Serial-3 Wire 8-Pin PDIP
其他特性
NONVOLATILE MEMORY
控制接口
INCREMENT/DECREMENT
转换器类型
DIGITAL POTENTIOMETER
JESD-30 代码
R-PDIP-T8
JESD-609代码
e3
长度
9.525 mm
功能数量
1
位置数
100
端子数量
8
最高工作温度
70 °C
最低工作温度
封装主体材料
PLASTIC/EPOXY
封装代码
DIP
封装等效代码
DIP8,.3
封装形状
RECTANGULAR
封装形式
IN-LINE
峰值回流温度(摄氏度)
NOT APPLICABLE
电源
5 V
认证状态
Not Qualified
电阻定律
LINEAR
最大电阻容差
20%
最大电阻器端电压
5 V
最小电阻器端电压
-5 V
座面最大高度
5.334 mm
标称供电电压
5 V
表面贴装
NO
技术
CMOS
标称温度系数
300 ppm/°C
温度等级
COMMERCIAL
端子面层
Matte Tin (Sn) - annealed
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT APPLICABLE
标称总电阻
50000 Ω
宽度
7.62 mm
文档预览
DATASHEET
X9C102, X9C103, X9C104, X9C503
Digitally Controlled Potentiometer (XDCP™)
The X9C102, X9C103, X9C104, X9C503 are Intersils’
digitally controlled (XDCP) potentiometers. The device
consists of a resistor array, wiper switches, a control section,
and non-volatile memory. The wiper position is controlled by
a three-wire interface.
The potentiometer is implemented by a resistor array
composed of 99 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS, U/D, and INC inputs.
The position of the wiper can be stored in non-volatile
memory and then be recalled upon a subsequent power-up
operation.
The device can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications ranging from control to signal processing to
parameter adjustment.
FN8222
Rev 3.00
July 20, 2009
Features
• Solid-State Potentiometer
• Three-Wire Serial Interface
• 100 Wiper Tap Points
- Wiper Position Stored in Non-volatile Memory and
Recalled on Power-up
• 99 Resistive Elements
- Temperature Compensated
- End-to-End Resistance, ±20%
- Terminal Voltages, ±5V
• Low Power CMOS
- V
CC
= 5V
- Active Current, 3mA max.
- Standby Current, 750µA max.
• High Reliability
- Endurance, 100,000 Data Changes per Bit
- Register Data Retention, 100 years
• X9C102 = 1k
• X9C103 = 10k
Pinout
X9C102, X9C103, X9C104, X9C503
(8 LD SOIC, 8 LD PDIP)
TOP VIEW
INC
U/D
V
H
/R
H
V
SS
1
2
3
4
8
7
6
5
V
CC
CS
V
L
/R
L
V
W
/R
W
• X9C503 = 50k
• X9C104 = 100k
• Packages
- 8 Ld SOIC
- 8 Ld PDIP
• Pb-Free Available (RoHS Compliant)
Block Diagram
U/D
INC
CS
V
CC
(SUPPLY VOLTAGE)
V
H
/R
H
CONTROL
AND
MEMORY
R
W
/V
W
V
L
/R
L
V
SS
(GROUND)
GENERAL
V
CC
GND
STORE AND
RECALL
CONTROL
CIRCUITRY
7-BIT
NON-VOLATILE
MEMORY
7-BIT
UP/DOWN
COUNTER
99
98
97
96
ONE
OF
ONE-
HUNDRED
DECODER
2
1
0
R
L
/V
L
R
W
/V
W
R
H/
V
H
UP/DOWN
(U/D)
INCREMENT (INC)
DEVICE
SELECT
(CS)
TRANSFER
GATES
RESISTOR
ARRAY
DETAILED
FN8222 Rev 3.00
July 20, 2009
Page 1 of 10
X9C102, X9C103, X9C104, X9C503
Ordering Information
PART
NUMBER
X9C102P
X9C102PZ (Notes 1, 2)
X9C102PI
X9C102PIZ (Notes 1, 2)
X9C102S*
,
**
X9C102SZ* (Note 1)
X9C102SI*
,
**
X9C102SIZ*
,
** (Note 1)
X9C103P
X9C103PZ (Notes 1, 2)
X9C103PI
X9C103PIZ (Note 1)
X9C103S*
,
**
X9C103SZ*
,
** (Note 1)
X9C103SI*
,
**
X9C103SIZ*
,
** (Note 1)
X9C503P
X9C503PZ (Notes 1, 2)
X9C503PI
X9C503PIZ (Notes 1, 2)
X9C503S*
X9C503SZ* (Note 1)
X9C503SI*
,
**
X9C503SIZ*
,
** (Note 1)
X9C104P
X9C104PI
X9C104PIZ (Notes 1, 2)
X9C104S*
,
**
X9C104SZ*
,
** (Note 1)
X9C104SI*
,
**
X9C104SIZ*
,
** (Note 1)
PART
MARKING
X9C102P
X9C102P Z
X9C102P I
X9C102P ZI
X9C102S
X9C102S Z
X9C102S I
X9C102S ZI
X9C103P
X9C103P Z
X9C103P I
X9C103P ZI
X9C103S
X9C103S Z
X9C103S I
X9C103S ZI
X9C503P
X9C503P Z
X9C503P I
X9C503P ZI
X9C503S
X9C503S Z
X9C503S I
X9C503S ZI
X9C104P
X9C104P I
X9C104P ZI
X9C104S
X9C104S Z
X9C104S I
X9C104S ZI
100
50
10
R
TOTAL
(k)
1
TEMP RANGE
(°C)
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
PACKAGE
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld PDIP
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
PACKAGE
DWG. #
MDP0031
MDP0031
MDP0031
MDP0031
MDP0027
MDP0027
MDP0027
MDP0027
MDP0031
MDP0031
MDP0031
MDP0031
MDP0027
MDP0027
MDP0027
MDP0027
MDP0031
MDP0031
MDP0031
MDP0031
MDP0027
MDP0027
MDP0027
MDP0027
MDP0031
MDP0031
MDP0031
MDP0027
MDP0027
MDP0027
MDP0027
*Add “T1” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
**Add “T2” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
2. Pb-free PDIPs can be used for through-hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
FN8222 Rev 3.00
July 20, 2009
Page 2 of 10
X9C102, X9C103, X9C104, X9C503
Pin Descriptions
PIN
NUMBER
1
2
3
PIN NAME
INC
U/D
V
H
/R
H
DESCRIPTION
INCREMENT
The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or
decrement the counter in the direction indicated by the logic level on the U/D input.
UP/DOWN
The U/D input controls the direction of the wiper movement and whether the counter is incremented or
decremented.
V
H
/R
H
The high (V
H
/R
H
) terminals of the X9C102, X9C103, X9C104, X9C503 are equivalent to the fixed terminals of
a mechanical potentiometer. The minimum voltage is -5V and the maximum is +5V. The terminology of V
H
/R
H
and V
L
/R
L
references the relative position of the terminal in relation to wiper movement direction selected by the U/D input and
not the voltage potential on the terminal.
V
SS
V
W
/R
W
V
W
/R
W
is the wiper terminal and is equivalent to the movable terminal of a mechanical potentiometer. The
position of the wiper within the array is determined by the control inputs. The wiper terminal series resistance is typically
40.
R
L
/V
L
The low (V
L
/R
L
) terminals of the X9C102, X9C103, X9C104, X9C503 are equivalent to the fixed terminals of a
mechanical potentiometer. The minimum voltage is -5V and the maximum is +5V. The terminology of V
H
/R
H
and V
L
/R
L
references the relative position of the terminal in relation to wiper movement direction selected by the U/D input and
not the voltage potential on the terminal.
CS
The device is selected when the CS input is LOW. The current counter value is stored in non-volatile memory when
CS is returned HIGH while the INC input is also HIGH. After the store operation is complete the X9C102, X9C103,
X9C104, X9C503 device will be placed in the low power standby mode until the device is selected once again.
V
CC
4
5
V
SS
V
W
/R
W
6
R
L
/V
L
7
CS
8
V
CC
FN8222 Rev 3.00
July 20, 2009
Page 3 of 10
X9C102, X9C103, X9C104, X9C503
Absolute Maximum Ratings
Voltage on CS, INC, U/D and V
CC
with Respect to V
SS
. -1V to +7V
Voltage on V
H
/R
H
and V
L
/R
L
Referenced to V
SS
. . . . . . . -8V to +8V
V
= |V
H
/R
H
- V
L
/R
L
|
X9C102 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4V
X9C103, X9C104, and X9C503 . . . . . . . . . . . . . . . . . . . . . . . .10V
I
W
(10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8.8mA
Power Rating
X9C102 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16mW
X9C103 X0C104, and X9C503 . . . . . . . . . . . . . . . . . . . . . .10mW
Thermal Information
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
*Pb-free PDIPs can be used for through-hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
Recommended Operating Conditions
Commercial Temperature Range. . . . . . . . . . . . . . . . . 0°C to +70°C
Industrial Temperature Range . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage Range (V
CC
) . . . . . . . . . . . . . . . . . . . . . . . 5V ±10%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
Electrical Specifications
Over recommended operating conditions unless otherwise stated.
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
(Note 6)
MAX
UNIT
POTENTIOMETER CHARACTERISTICS
R
TOTAL
V
VH/RH
V
VL/RL
I
W
R
W
End-to-End Resistance Variation
V
H
Terminal Voltage
V
L
Terminal Voltage
Wiper Current
Wiper Resistance
Resistor Noise (Note 7)
Charge Pump Noise (Note 7)
Resolution
Absolute Linearity (Note 3)
Relative Linearity (Note 4)
R
TOTAL
Temperature Coefficient
R
TOTAL
Temperature Coefficient
Ratiometric Temperature Coefficient
C
H
/C
L
/C
W
(Note 7)
Potentiometer Capacitances
See “Circuit #3 SPICE Macro
Model” on page 5.
V
W(n)(actual)
- V
W(n)(EXPECTED)
V
W(n + 1)(ACTUAL)
- [V
W(n) + MI
]
X9C103, X9C503, X9C104
X9C102
-1
-0.2
±300 (Note 7)
±600 (Note 7)
±20
10/10/25
Wiper Current = ±1mA
Ref 1kHz
@ 850kHz
-20
-5
-5
-4.4
40
-120
20
1
+1
+0.2
+20
+5
+5
4.4
100
%
V
V
mA
dBV
mV
RMS
%
MI (Note 5)
MI (Note 5)
ppm/°C
ppm/°C
ppm/°C
pF
DC OPERATING CHARACTERISTICS
I
CC
I
SB
I
LI
V
IH
V
IL
C
IN
V
CC
Active Current
Standby Supply Current
CS, INC, U/D Input Leakage Current
CS, INC, U/D input HIGH Voltage
CS, INC, U/D input LOW Voltage
CS, INC, U/D Input Capacitance (Note 7)
V
CC
= 5V, V
IN
= V
SS
, T
A
= +25°C,
f = 1MHz
10
CS = VIL, U/D = V
IL
or V
IH
and
INC = 0.4V to 2.4V at Max t
CYC
CS = V
CC
- 0.3V, U/D and
INC = V
SS
or V
CC
- 0.3V
V
IN
= V
SS
to V
CC
2
0.8
1
200
3
750
±10
mA
µA
µA
V
V
pF
FN8222 Rev 3.00
July 20, 2009
Page 4 of 10
X9C102, X9C103, X9C104, X9C503
Electrical Specifications
Over recommended operating conditions unless otherwise stated.
(Continued)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
(Note 6)
MAX
UNIT
AC OPERATION CHARACTERISTICS
t
Cl
t
lD
t
DI
t
lL
t
lH
t
lC
t
CPH
t
CPH
t
IW (5)
t
CYC
t
CYC
t
R
, t
F
t
PU
NOTES:
3. Absolute linearity is utilized to determine actual wiper voltage vs expected voltage = [V
W(n)(actual)
- V
W(n)(expected )
] = ±1 MI Maximum.
4. Relative linearity is a measure of the error in step size between taps = V
W(n + 1)
- [V
W(n) + MI
] = +0.2 MI.
5. 1 MI = Minimum Increment = R
TOT
/99.
6. Typical values are for T
A
= +25°C and nominal supply voltage.
7. This parameter is not 100% tested.
CS to INC Setup
INC HIGH to U/D Change
U/D to INC Setup
INC LOW Period
INC HIGH Period
INC Inactive to CS Inactive
CS Deselect Time (STORE)
CS Deselect Time (NO STORE)
INC to V
W/RW
Change
INC Cycle Time
INC Input Rise and Fall Time
Power-up to Wiper Stable (Note 7)
V
CC
Power-up Rate (Note 7)
0.2
500
50
2
500
100
100
2.9
1
1
1
20
100
100
ns
ns
µs
µs
µs
µs
ms
ns
µs
µs
µs
µs
V/ms
Test Circuit #1
V
R
/R
H
Test Circuit #2
V
H
/R
H
TEST POINT
Circuit #3 SPICE Macro Model
R
TOTAL
R
L
C
L
C
W
C
L
10pF
R
H
V
S
TEST POINT
V
w
/R
W
V
L
/R
L
V
L
/R
L
V
W
/R
w
FORCE
CURRENT
10pF
25pF
R
W
Endurance and Data Retention
PARAMETER
Medium Endurance
Data Retention
MIN
100,000
100
UNIT
Data changes per bit
per register
years
Power-up and Down Requirements
At all times, voltages on the potentiometer pins must be less
than ±V
CC
. The recall of the wiper position from non-volatile
memory is not in effect until the V
CC
supply reaches its final
value. The V
CC
ramp rate specification is always in effect.
AC Conditions of Test
Input Pulse Levels
Input Rise and Fall Times
Input Reference Levels
0V to 3V
10ns
1.5V
FN8222 Rev 3.00
July 20, 2009
Page 5 of 10
查看更多>
热门器件
热门资源推荐
器件捷径:
L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ
需要登录后才可以下载。
登录取消