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XC1701LPC20C

1M X 1 CONFIGURATION MEMORY, PQCC20
1M × 1 配置存储器, PQCC20

器件类别:存储    存储   

厂商名称:XILINX(赛灵思)

厂商官网:https://www.xilinx.com/

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器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
XILINX(赛灵思)
零件包装代码
QLCC
包装说明
PLASTIC, LCC-20
针数
20
Reach Compliance Code
_compli
ECCN代码
EAR99
其他特性
USED FOR STORING THE CONFIGURATION BITSTREAMS OF XILINX FPGAS
最大时钟频率 (fCLK)
15 MHz
I/O 类型
COMMON
JESD-30 代码
S-PQCC-J20
JESD-609代码
e0
长度
8.9662 mm
内存密度
1048576 bi
内存集成电路类型
CONFIGURATION MEMORY
内存宽度
1
湿度敏感等级
3
功能数量
1
端子数量
20
字数
1048576 words
字数代码
1000000
工作模式
SYNCHRONOUS
最高工作温度
70 °C
最低工作温度
组织
1MX1
输出特性
3-STATE
封装主体材料
PLASTIC/EPOXY
封装代码
QCCJ
封装等效代码
LDCC20,.4SQ
封装形状
SQUARE
封装形式
CHIP CARRIER
并行/串行
SERIAL
峰值回流温度(摄氏度)
225
电源
3.3 V
认证状态
Not Qualified
座面最大高度
4.572 mm
最大待机电流
0.00005 A
最大压摆率
0.01 mA
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
3 V
标称供电电压 (Vsup)
3.3 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子面层
Tin/Lead (Sn85Pb15)
端子形式
J BEND
端子节距
1.27 mm
端子位置
QUAD
处于峰值回流温度下的最长时间
30
宽度
8.9662 mm
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Device Package
User Guide
UG112 (v3.7) September 5, 2012
R
R
Notice of Disclaimer
The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum
extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL
WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether
in contract or tort, including negligence, or under any other theory of liability) for any loss or damage of any kind or nature related to, arising
under, or in connection with, the Materials (including your use of the Materials), including for any direct, indirect, special, incidental, or
consequential loss or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action
brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same.
Xilinx assumes no obligation to correct any errors contained in the Materials or to notify you of updates to the Materials or to product
specifications. You may not reproduce, modify, distribute, or publicly display the Materials without prior written consent. Certain products are
subject to the terms and conditions of the Limited Warranties which can be viewed at
http://www.xilinx.com/warranty.htm;
IP cores may be
subject to warranty and support terms contained in a license issued to you by Xilinx. Xilinx products are not designed or intended to be fail-
safe or for use in any application requiring fail-safe performance; you assume sole risk and liability for use of Xilinx products in Critical
Applications:
http://www.xilinx.com/warranty.htm#critapps.
© 2004–2012 Xilinx, Inc. Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated brands
included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective
owners.
Device Package User Guide
www.xilinx.com
UG112 (v3.7) September 5, 2012
Revision History
The following table shows the revision history for this document.
Date
01/31/04
02/04/05
05/31/06
05/18/07
Version
1.0
1.1
2.0
3.0
Initial release
Added Pb-free packaging information.
Revision
Extensive updates and new material added.
Updated
“Material Data Declaration Sheet (MDDS)” in Chapter 1;
revised link to “Xilinx
Packaging Material Content Data for Standard and PB-Free Packages”.
Revised
“Part Marking” in Chapter 1;
added
“Ordering Information”, “Marking
Template”, Table 1-1: “Example Part Numbers (FPGA, CPLD, and PROM)”,
and
Table 1-2: “Xilinx Device Marking Definition—Example”.
Updated
“Flip-Chip BGA Packages” in Chapter 1;
added content to
“Package
Construction”
to clarify Type I and Type II lid usage.
Updated
“Thermal Management & Thermal Characterization Methods & Conditions” in
Chapter 3;
removed “Junction-to-Board Measurement -
ΨJB”,
added link to new
“Data
Acquisition and Package Thermal Database”,
added
Figure 3-11, page 53, “Package
Thermal Data Query for Device-Specific Data”
(query tool replaces Table 3-1: “Summary
of Thermal Resistance for Packages”, which was removed).
Updated
“Recommended PCB Design Rules for BGA, CSP, and CCGA Packages,”
page 87;
added missing (D) values for CP56 and CP132 packages and corrected SF363
package specification (D) value in
Table 5-3, page 88.
Added CS48 to
Table 5-4, page 88.
Updated
Table 6-2, page 108
to include MSL ratings for Pb-free packages.
Updated
“Package Peak Reflow Temperature” in Chapter 7;
correction to peak reflow
temperature. Added post-wash bake details to
“Post Reflow Washing”
section.
12/18/08
3.1
Added link to Package Thermal Data Query Tool on xilinx.com. Updated remaining
external links.
Added Spartan®-3A DSP information to
Table 1-1, page 13.
Added these packages to
Table 2-3, page 36:
FG484 and FGG484.
Added these packages to
Table 5-3, page 88:
SFG363, FF676, FGG484, FFG676, FT64 and
FTG64.
Removed these packages from
Table 5-3, page 88:
FF896, FFG896, FF1704, FFG1704,
FF1696 and FFG1696.
Added these packages to
Table 5-4, page 88:
CS484 and CSG484.
UG112 (v3.7) September 5, 2012
www.xilinx.com
Device Package User Guide
Date
03/17/09
Version
3.2
Revision
Revised
“Small Form Factor Packages,” page 15
to include description of third template
used for marking small form factor packages.
Revised
“Package Construction,” page 20
to describe flip-chip package vent hole
locations.
Added missing Pb-free packages to
Table 1-3, page 27.
Revised mass of FG676 and FGG676 packages in
Table 1-3, page 27.
Added CS484 and CSG484 information to
Table 1-3, page 27
and
Table 2-3, page 36.
Added FF1136 and FFG1136 tray and box information to
Table 2-3, page 36.
Changed link from DS529 to UG331 in third paragraph of
“Data Acquisition and
Package Thermal Database,” page 52.
Added CS484 electrical data to
Table 4-1, page 75.
Added note to
Table 5-3, page 88,
referring to UG195.
Revised humidity value in third paragraph of
“Dry Bake Recommendation and Dry Bag
Policy,” page 107.
Revised humidity value in first and fourth paragraph of
“Expiration Date,” page 107.
Updated links in
Table A-1, page 121.
04/23/09
3.3
Added FG400, FGG400, FF323, FFG323,
FF324, FFG324,
FF665, FFG665, FF676, FFG676,
FF1153, FFG1153, FF1156, FFG1156, FF1738, FFG1738, FF1760, and FFG1760 to
Table 2-3,
page 36.
Revised the via land diameters for CF1140, CF1144, and CF1509 packages in
Table 5-5,
page 89.
06/10/09
3.4
Revised third paragraph of
“Package Construction,” page 20
about EF flip-chip package
epoxy protection.
Revised second paragraph of
“Post Reflow Washing,” page 117
excepting EF packages
from cleaning solution/solvent recommendation.
11/06/09
3.5
Added link to MDDS documents under
“Material Data Declaration Sheet (MDDS),”
page 10.
Added FF896, EF1152, EF1704, FF1704, EF668, and EF672 to
Table 5-3, page 88.
Added EF957 to
Table 5-4, page 88.
Added CS225/CSG225 and CS324/CSG324 in
Table 2-3, page 36.
Added CF1752 to
heading in CF1509 column, and changed “Solder (ball) land pitch” to “Solder (column)
land pitch” in
Table 5-5, page 89.
Added VO48/VOG48 in
Table 6-2, page 108.
Updated
“Thermal Management,” page 39.
Updated
“Characterization Methods,”
page 47
and added
“Calibration of System Monitor,” page 47.
Removed T
t
and T
l
from
and added T
S
to
“Definition of Terms,” page 48.
Updated
“Junction-to-Case
Measurement — qJC,” page 49,
with JEDEC Standard JESD51-14. Updated document
references in
“Data Acquisition and Package Thermal Database,” page 52.
Removed
“Junction-to-Top Measurement —
Ψ
JT
” and “Support for Compact Thermal Models
(CTM).” Updated note for T
A
in
“Thermal Data Usage Examples,” page 54.
Updated
“Additional Power Management Options,” page 57.
09/22/10
3.6
09/05/12
3.7
Device Package User Guide
www.xilinx.com
UG112 (v3.7) September 5, 2012
Table of Contents
Revision History
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Chapter 1: Package Information
Package Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Introduction to Xilinx Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Packaging Technology at Xilinx. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Material Data Declaration Sheet (MDDS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package Samples
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Specifications and Definitions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Inches vs. Millimeters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pressure Handling Capacity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clockwise or Counterclockwise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cavity-Up or Cavity-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
11
12
12
Part Marking
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Marking Template . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Package Technology Descriptions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Pb-Free Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cavity-Up Plastic BGA Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cavity-Down Thermally Enhanced BGA Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Flip-Chip BGA Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Assembling Flip-Chip BGAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chip Scale Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Quad Flat No-Lead (QFN) Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ceramic Column Grid Array (CCGA) Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermally Enhanced Lead Frame Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
17
18
19
21
22
23
24
25
Package Mass Table
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Chapter 2: Pack and Ship
Introduction
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Tape and Reel
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Benefits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cover Tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bar Code Label . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Shipping Box . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Standard Bar Code Label Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
31
32
32
32
32
34
Tubes
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Trays
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Device Package User Guide
UG112 (v3.7) September 5, 2012
www.xilinx.com
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