XC25BS3
Series
PLL Clock Generator ICs with Built-In Divider/Multiplier Circuits
ETR1501_004a
■GENERAL
DESCRIPTION
The XC25BS3 series are high frequency, low power consumption PLL clock generator ICs with built-in crystal oscillator circuit,
divider circuit & multiplier PLL circuit.
Laser trimming gives the option of being able to select from divider ratios (M) of 1 to 2047 and multiplier ratio (N) of 20 to
2047. Output frequency (Q0) is equal to reference oscillation (fCLKin) multiplied by N/M, within a range of 9MHz to 80MHz.
Q1 output is selectable from input reference frequency (f0), Ground (GND), PLL output frequency/2 (Q0/2), and comparative
frequency/2 (f0/M/2). Reference oscillation can input 14kHz to 35MHz of reference clock. Further, comparative frequency,
within a range of 14kHz to 500kHz, can be obtained by dividing the reference oscillation. By halting oscillation via the CE
pin, consumption current can be controlled.
Output will be one of high impedance.
■APPLICATIONS
●Crystal
oscillation modules
●Microcontroller
●PDAs
●Portable
audio systems
●Various
system clocks
■FEATURES
Output Frequency
Input Frequency
(fCLKin)
Divider Ratio (M)
Multiplier Ratio (N)
Output
: Selectable from divisions of 1 ~ 2047
: Selectable from multiplications of 20 ~ 2047
: 3-State
Q1 output selectable from
reference oscillation, GND, PLL
output frequency/2, comparative
frequency/2.
Operating Voltage Range
: 2.97V ~ 5.5V
Low Power Consumption
: CMOS (stand-by function included)*1
Comparative Frequency
: 14kHz ~ 500kHz
Ultra Small Package
: SOT-26, USP-6B
Environmentally Friendly
: EU RoHS Compliant, Pb Free
*1 High output impedance during stand-by
: 9MHz ~ 80MHz (Q0=fCLKin×N/M)
: 14kHz ~ 35MHz
■PIN
CONFIGURATION
Q1
VDD
CLKin
SOT-26
(TOP VIEW)
■PIN
ASSIGNMENT
PIN NUMBER
Q0
VSS
CE
SOT-26 USP-6B
1
2
3
3
2
1
6
5
4
PIN NAME
CE
V
SS
Q0
Q1
V
DD
CLKin
FUNCTION
Chip Enable
GND
PLL Output
Reference Oscillation, GND,
Comparative Frequency/2,
or PLL Output/2 Output *
Power Supply
Reference Clock Input
*The dissipation pad for the USP-6B
package should be solder-plated in
recommended mount pattern and metal
masking so as to enhance mounting
strength and heat release.
If the pad needs to be connected to other
pins, it should be connected to the V
DD
pin.
4
5
6
* Q1 Output is selectable from the above mentioned functions.
1/12
XC25BS3
Series
■FUNCTION
LIST
●CE,Q0/Q1
True Logic
CE
“H”
“L”
Open
FUNCTION
Q0/Q1 Clock Output
Stand-by Output Pin = High Impedance
Stand-by Output Pin = High Impedance
(V
SS
pin pull-down due to IC's internal resistance)
"H" = High level
"L" = Low level
■PRODUCT
CLASSIFICATION
●Ordering
Information
XC25BS3①②③④⑤-⑥
(*1)
DESIGNATOR
①②③
DESCRIPTION
Product Number
SYMBOL
Integer
MR
④⑤-⑥
Packages
Taping Type
(*2)
MR-G
DR
DR-G
(*1)
(*2)
DESCRIPTION
Based on internal standards
e.g. Product number 001
→
SOT-26
SOT-26
USP-6B
USP-6B
①②③
= 001
The “-G” suffix indicates that the products are Halogen and Antimony free as well as being fully RoHS compliant.
The device orientation is fixed in its embossed tape pocket. For reverse orientation, please contact your local Torex sales office or
representative. (Standard orientation:
④R-⑥,
Reverse orientation:
④L-⑥)
■BLOCK
DIAGRAM
■ABSOLUTE
MAXIMUM RATINGS
PARAMETER
Supply Voltage
CLKin Pin Voltage
CE Pin Voltage
Q0 Pin Voltage
Q1 Pin Voltage
Q0 Output Current
Q1 Output Current
Power Dissipation
SOT-26
USP-6B
SYMBOL
V
DD
V
CK
V
CE
V
Q0
V
Q1
I
Q0
I
Q1
Pd
Topr
Tstg
CONDITIONS
V
SS
-0.3∼V
SS
+7.0
V
SS
-0.3∼V
DD
+0.3
V
SS
-0.3∼V
DD
+0.3
V
SS
-0.3∼V
DD
+0.3
V
SS
-0.3∼V
DD
+0.3
±50
±50
150
100
-30∼+80
-40∼+125
Ta = 25℃
UNITS
V
V
V
V
V
mA
mA
mW
℃
℃
Storage Temperature Range
Operating Temperature Range
2/12
XC25BS3
Series
■ELECTRICAL
CHARACTERISTICS
XC25BS30xxMR
●Set
Value (example 1)
PARAMETER
Input Frequency
Q0 Pin Output Multiplier Ratio
Output Frequency 1
Output Frequency 2
SYMBOL
fCLKin
N/M
fQ0
Q1
MIN.
13.000
−
52.000
TYP.
−
4.000
−
fCLKin
MAX.
20.000
−
80.000
UNITS
MHz
Multiplier
MHz
−
●DC
Characteristics
XC25BS30xxMR
PARAMETER
Supply Voltage
Input Voltage "High"
Input Voltage "Low"
Input Current "High"
Input Current "Low"
Output Voltage "High"
Output Voltage "Low"
Supply Current 1
Supply Current 2
CE "High" Voltage
CE "Low" Voltage
CE Pull-Down Resistance 1
CE Pull-Down Resistance 2
SYMBOL
V
DD
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
I
DD1
I
DD2
V
CEH
V
CEL
Rp1
Rp2
fCLKin=20MHz, Q0 pin output multiplier ratio=4, Ta=25℃, No Load
CONDITIONS
V
CK
=3.3V
V
CK
=0V
V
DD
=2.97V, I
OH
=-8mA
V
DD
=2.97V, I
OL
=8mA
CE=3.3V
CE=0V
CE=3.3V
CE=0.3V
MIN.
2.97
2.7
−
−
-3.0
2.5
−
−
−
2.70
−
0.5
20.0
TYP.
3.30
−
−
−
−
−
−
5.5
−
−
−
1.5
50.0
MAX.
3.63
−
0.6
3.0
−
−
0.4
11.0
5.0
−
0.45
2.5
80.0
UNITS
V
V
V
μA
μA
V
V
mA
μA
V
V
MΩ
kΩ
●AC
Characteristics
XC25BS30xxMR
PARAMETER
Output Rise Time
Output Fall Time
Duty Ratio
Output Start Time
PLL Output Jitter
SYMBOL
T
TLH
T
THL
DUTY
Ton
Tj
fCLKin=20MHz, Q0 pin output multiplier ratio=4, Ta=25℃, CL=15pF
CONDITIONS
V
DD
=3.3V (20% to 80%) (*2)
V
DD
=3.3V (20% to 80%) (*2)
(*2)
1σ(*2)
MIN.
−
−
40
−
−
TYP.
5.0
5.0
50
−
60
MAX.
−
−
60
20
−
*2
UNITS
ns
ns
%
ms
ps
R&D guarantee
3/12
XC25BS3
Series
■ELECTRICAL
CHARACTERISTICS (Continued)
XC25BS30xxMR (Continued)
●Set
Value (example 2)
PARAMETER
Input Frequency
Q0 Pin Output Multiplier Ratio
Output Frequency 1
Output Frequency 2
SYMBOL
fCLKin
N/M
fQ0
Q1
MIN.
10.000
−
30.000
TYP.
−
3.000
−
GND
MAX.
16.000
−
48.000
UNITS
MHz
Multiplier
MHz
−
●DC
Characteristics
XC25BS30xxMR
PARAMETER
Supply Voltage
Input Voltage "High"
Input Voltage "Low"
Input Current "High"
Input Current "Low"
Output Voltage "High"
Output Voltage "Low"
Supply Current 1
Supply Current 2
CE "High" Voltage
CE "Low" Voltage
CE Pull-Down Resistance 1
CE Pull-Down Resistance 2
SYMBOL
V
DD
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
I
DD1
I
DD2
V
CEH
V
CEL
Rp1
Rp2
fCLKin=16MHz, Q0 pin output multiplier ratio=3, Ta=25℃, No Load
CONDITIONS
V
CK
=3.3V
V
CK
=0V
V
DD
=2.97V, I
OH
=-8mA
V
DD
=2.97V, I
OL
=8mA
CE=3.3V
CE=0V
CE=3.3V
CE=0.3V
MIN.
2.97
2.7
−
−
-3.0
2.5
−
−
−
2.70
−
0.5
20.0
TYP.
3.30
−
−
−
−
−
−
4.0
−
−
−
1.5
50.0
MAX.
3.63
−
0.6
3.0
−
−
0.4
8.0
5.0
−
0.45
2.5
80.0
UNITS
V
V
V
μA
μA
V
V
mA
μA
V
V
MΩ
kΩ
●
AC Characteristics
XC25BS30xxMR
PARAMETER
Output Rise Time
Output Fall Time
Duty Ratio
Output Start Time
PLL Output Jitter
SYMBOL
T
TLH
T
THL
DUTY
Ton
Tj
fCLKin=16MHz, Q0 pin output multiplier ratio=3, Ta=25℃, CL=15pF
CONDITIONS
V
DD
=3.3V (20% to 80%) (*2)
V
DD
=3.3V (20% to 80%) (*2)
(*2)
1σ(*2)
MIN.
−
−
40
−
−
TYP.
5.0
5.0
50
−
60
MAX.
−
−
60
20
−
*2
UNITS
ns
ns
%
ms
ps
R&D guarantee
4/12
XC25BS3
Series
■TYPICAL
APPLICATION CIRCUITS
●Circuit
Example
①Q1
Pin - reference oscillation, PLL output frequency/2, comparative frequency/2
②Q1
Pin - GND
■NOTES
ON USE
(1)
Please insert a by-pass capacitor of 0.1μF.
(2) Rq0 and Rq1 are matching resistors. Their use is recommended in order to counter unwanted radiations.
(3) Please place a by-pass capacitor and matching resistors as close to the IC as possible. The output may not be
locked if the by-pass capacitor is not close enough to the IC. Further, there is a possibility of unwanted radiation
occurrence between the resistor and the IC pin if the matching resistors are not close enough to the IC.
(4)
When selecting GND for the Q1 pin, although the IC will be connected to GND internally, it is also recommended that
the PCB be connected to GND.
(5) When the CE pin is not controlled by external signals, it is recommended that a time constant circuit of R1=1kΩ×
C1=0.1μF be added for stability.
(6) With this IC, output is achieved by dividing and multiplying the reference oscillation by means of the PLL circuit.
may increase, so all necessary precautions should be taken to avoid this.
(7) It is recommended that a low noise power supply, such as a series regulator, be used for the supply voltage. Using
a power supply such as a switching regulator might lead to a larger jitter, which in turn may lead to an inability to lock
due to the ripple of the switching regulator.
(8)
As for this IC, synchronization of input and output signal’s edge is not guaranteed though the input frequency
operates to the output frequency multiply.
In
cases where this output is further used as a reference oscillation of another PLL circuit, the final output signal's jitter
5/12
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