XC6119
Series
Voltage Detector with Delay Time Adjustable
ETR02016-003
■GENERAL
DESCRIPTION
The XC6119 series is a highly precise, low power consumption voltage detector, manufactured using CMOS and laser trimming
technologies.
The device includes the built-in delay circuit. A release delay time can be set freely by connecting an external delay capacitor to
the Cd pin.
The device using an ultra small package (USPN-4) is suited for high density mounting applications.
Both CMOS and N-channel open drain output configurations are available.
■APPLICATIONS
●Microprocessor
reset circuitry
●Charge
voltage monitors
●Memory
battery back-up switch circuits
●Power
failure detection circuits
■FEATURES
High Accuracy
:
+2%
(Detection Voltage >1.5V)
+30mV
(Detection Voltage <1.5V)
Low Power Consumption
: 0.5μA TYP. in detect state
(V
DF
=1.0V, V
IN
= 0.9V)
0.9μA TYP. in release state
(V
DF
=1.0V, V
IN
= 1.1V)
Detect Voltage Options
Operating Voltage Range
: 0.8V ~ 5.0V (0.1V increments)
: 0.7V ~ 6.0V
: ±100ppm/
O
C TYP.
Detect Voltage Temperature Characteristics
Output Configuration
Built-In Delay Circuit
Operating Ambient Temperature
Packages
Environmentally Friendly
: CMOS or
N-channel open drain
: Delay Time Adjustable
: -40
O
C ~ +85
O
C
: SSOT-24, USPN-4
: EU RoHS Compliant, Pb Free
■TYPICAL
APPLICATION CIRCUIT
■TYPICAL
PERFORMANCE
CHARACTERISTICS
●Release
Delay Time vs. Delay Capacitance
XC6119xxxAx
Release Delay Time: t
DR
(ms)
10000
1000
100
10
1
0.1
0.0001
VIN(min)=0.7V VIN(max)=6.0V
t
r
=5
μ
s Ta=25
℃
(No Pull-Up resistor needed
for CMOS output product)
0.001
0.01
0.1
1
Delay Capacitance: Cd (
μ
F)
1/16
XC6119
Series
■PIN
CONFIGURATION
USPN-4
(BOTTOM VIEW)
SSOT-24
（TOP
VIEW）
■PIN
ASSIGNMENT
PIN NUMBER
USPN-4
1
2
3
4
SSOT-24
4
3
2
1
V
OUT
Cd
V
SS
V
IN
Output (Detect ”L”)
Delay Capacitance
Ground
Input
PIN NAME
FUNCTION
■
PRODUCT CLASSIFICATION
●Ordering
Information
XC6119①②③④⑤⑥-⑦
(*1)
DESIGNATOR
①
②③
④
⑤⑥-⑦
ITEM
Output Configuration
Detect Voltage
Output Delay &
Hysteresis
Packages
(Order Unit)
SYMBOL
C
N
08 ~ 50
A
7R-G
NR-G
DESCRIPTION
CMOS output
N-ch open drain output
e.g. 18→1.8V
Built-in delay pin & hysteresis 5% (TYP.)
USPN-4 (5,000/Reel)
SSOT-24 (3,000/Reel)
(*1)
The “-G” suffix denotes Halogen and Antimony free as well as being fully RoHS compliant.
2/16
XC6119
Series
■BLOCK
DIAGRAMS
(1) XC6119C (CMOS Output)
(2) XC6119N (N-ch Open Drain Output)
* Diodes inside the circuits are ESD protection diodes and parasitic diodes.
■ABSOLUTE
MAXIMUM RATINGS
Ta=25℃
PARAMETER
Input Voltage
Output Current
XC6119C (*1)
XC6119N (*2)
Delay Pin Voltage
Delay Pin Current
USPN-4 *
SSOT-24
SYMBOL
V
IN
I
OUT
V
OUT
V
CD
I
CD
Pd
Ta
Tstg
RATINGS
V
SS
-0.3½+7.0
10
V
SS
-0.3½V
IN
+0.3
V
SS
-0.3½+7.0
V
SS
-0.3½V
IN
+0.3
5.0
100
150
-40½+85
-55½+125
UNITS
V
mA
V
V
mA
mW
o
o
Output
Voltage
Power
Dissipation
Operating Ambient Temperature
Storage Temperature
NOTE:
*1: CMOS output
*2: N-ch open drain output
C
C
3/16
XC6119
Series
■ELECTRICAL
CHARACTERISTICS
PARAMETER
Operating Voltage
Detect Voltage
Hysteresis Width
SYMBOL
V
IN
V
DF
V
HYS
CONDITIONS
V
DF(T)
=0.8½5.0V
(*1)
V
DF(T)
=0.8½5.0V
V
IN
=1.0½6.0V
V
IN
=V
DF
×0.9
V
DF(T)
=0.8½1.9V
V
DF(T)
=2.0½3.9V
V
DF(T)
=4.0½5.0V
V
IN
=V
DF
×1.1
V
DF(T)
=0.8½1.9V
V
DF(T)
=2.0½3.9V
V
DF(T)
=4.0½5.0V
V
IN
=0.7V
V
DS
=0.5V(Nch)
V
IN
=1.0V(※2)
V
DS
=0.5V(Nch)
V
IN
=2.0V(※3)
V
DS
=0.5V(Nch)
V
IN
=3.0V(※4)
V
DS
=0.5V(Nch)
V
IN
=4.0V(※5)
V
DS
=0.5V(Nch)
V
IN
=VDF×1.1
V
DS
=0.5V(Pch)
V
IN
= V
DF
×0.9V,
V
OUT
= 0V,
Cd: Open
V
IN
= 6.0V, V
OUT
= 6.0V,
Cd: Open
o
o
-40 C≦T
a
≦85
C
Ta=25℃
MIN.
0.7
V
DF
×0.02
TYP.
MAX.
6.0
UNIT
V
V
CIRCUIT
-
①
①
E-1
V
DF
×0.05
0.5
0.6
0.7
0.9
1.1
1.2
V
DF
×0.08
1.2
1.3
1.4
1.8
2.0
2.2
V
Supply Current 1
I
SS1
μA
②
Supply Current 2
I
SS2
μA
②
0.01
0.1
0.8
1.2
1.6
0.36
0.7
1.6
2.0
2.3
E-2
-0.20
μA
0.20
±100
0.40
ppm/
o
C
2.4
0.6
3.1
0.4
230
200
MΩ
μA
V
V
μs
μs
①
⑤
⑤
⑥
⑦
⑧
⑧
③
mA
④
mA
③
I
OUT1
Output Current
I
OUT2
(*6)
Leakage
Current
CMOS output
(P-ch)
N-ch Open
Drain Output
I
LEAK
ΔV
DF
/
(ΔTa・
V
DF
)
R
DELAY
I
CD
V
TCD
V
UNS
t
DF0
t
DR0
Temperature
Characteristics
Delay Resistance
(*7)
Delay Pin Sink Current
Delay Capacitance Pin
Threshold Voltage
Unspecified Operating
Voltage
(*8)
Detect Delay Time
(*9)
Detect Delay Time
(*9)
V
IN
=6.0V, Cd=0V
Cd=0.5V, V
IN
=0.7V
V
IN
=1.0V
V
IN
=6.0V
V
IN
=0½0.7V
V
IN
=6.0→0.7V
Cd: Open
V
IN
=0.7V→6.0V
Cd: Open
1.6
8
0.4
2.9
2.0
60
0.5
3.0
0.3
30
30
NOTE:
*1: V
DF(T):
Setting Detect Voltage
*2: V
DF(T)
＞1.0V
*3: V
DF(T)
＞2.0V
*4: V
DF(T)
＞3.0V
*5: V
DF(T)
＞4.0V
*6: This numerical value is applied only to the XC6119C series (CMOS output).
*7: Calculated from the voltage value and the current value of both ends of the resistor.
*8: The maximum voltage of the V
OUT
in the range of the V
IN
0 to 0.7V. This numerical value is applied only to the XC6119C series
(CMOS output).
*9: Time which ranges from the state of V
IN
=V
DF
to the V
OUT
reaching 0.6V when the V
IN
falls without connecting to the Cd pin.
*10: Time which ranges from the state of V
IN
= V
DF
+V
HYS
to the V
OUT
reaching 5.4V when the V
IN
rises without connecting to the Cd
pin.
4/16
XC6119
Series
■VOLTAGE
CHART
SYMBOL
PARAMETER
SETTING
DETECT
VOLTAGE
V
DF(T)
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
5.0
E-1
DETECT VOLTAGE
(*1)
(V)
E-2
OUTPUT CURRENT
(*2)
(mA)
MIN.
0.770
0.870
0.970
1.070
1.170
1.270
1.370
1.470
1.568
1.666
1.764
1.862
1.960
2.058
2.156
2.254
2.352
2.450
2.548
2.646
2.744
2.842
2.940
3.038
3.136
3.234
3.332
3.430
3.528
3.626
3.724
3.822
3.920
4.018
4.116
4.214
4.321
4.410
4.508
4.606
4.704
4.802
4.900
V
DF
TYP.
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
5.0
I
OUT2
MAX.
0.830
0.930
1.030
1.130
1.230
1.330
1.430
1.530
1.632
1.734
1.836
1.938
2.040
2.142
2.244
2.346
2.448
2.550
2.652
2.754
2.856
2.958
3.060
3.162
3.264
3.366
3.468
3.570
3.672
3.774
3.876
3.978
4.080
4.182
4.284
4.386
4.488
4.590
4.692
4.794
4.896
4.998
5.100
MIN.
-0.40
TYP.
-0.20
-0.60
-0.30
-0.80
-0.40
-1.00
-0.50
-1.20
-0.60
-1.30
-0.65
NOTE:
*1: When V
DF(T)
≦1.4V,
the detection accuracy is
±30mV.
When V
DF(T)
≧1.5V,
the detection accuracy is
±2%.
*2: This numerical value is applied only to the XC6119C series (CMOS output).
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