XC7SET32
2-input OR gate
Rev. 01 — 3 September 2009
Product data sheet
1. General description
XC7SET32 is a high-speed Si-gate CMOS device. It provides a 2-input OR function.
2. Features
I
Symmetrical output impedance
I
High noise immunity
I
ESD protection:
N
HBM JESD22-A114E: exceeds 2000 V
N
MM JESD22-A115-A: exceeds 200 V
N
CDM JESD22-C101C: exceeds 1000 V
I
Low power dissipation
I
Balanced propagation delays
I
SOT353-1 and SOT753 package options
I
Specified from
−40 °C
to +125
°C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
XC7SET32GW
XC7SET32GV
−40 °C
to +125
°C
−40 °C
to +125
°C
Name
TSSOP5
SC-74A
Description
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
plastic surface-mounted package; 5 leads
Version
SOT353-1
SOT753
Type number
NXP Semiconductors
XC7SET32
2-input OR gate
4. Marking
Table 2.
Marking codes
Marking code
[1]
gG
g32
Type number
XC7SET32GW
XC7SET32GV
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1
2
B
A
Y
4
1
2
≥1
4
mna164
mna165
Fig 1. Logic symbol
Fig 2. IEC logic symbol
B
Y
A
mna166
Fig 3. Logic diagram
6. Pinning information
6.1 Pinning
XC7SET32
B
A
1
2
5
V
CC
GND
3
001aak116
4
Y
Fig 4. Pin configuration SOT353-1 (TSSOP5) and SOT753 (SC-74A)
XC7SET32_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 3 September 2009
2 of 11
NXP Semiconductors
XC7SET32
2-input OR gate
6.2 Pin description
Table 3.
Symbol
B
A
GND
Y
V
CC
Pin description
Pin
1
2
3
4
5
Description
data input
data input
ground (0 V)
data output
supply voltage
7. Functional description
Table 4.
Function table
H = HIGH voltage level; L = LOW voltage level
Inputs
A
L
L
H
H
B
L
H
L
H
Output
Y
L
H
H
H
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CC
V
I
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
Min
−0.5
−0.5
Max
+7.0
+7.0
-
±20
±25
75
-
+150
250
Unit
V
V
mA
mA
mA
mA
mA
°C
mW
V
I
<
−0.5
V
V
O
<
−0.5
V or V
O
> V
CC
+ 0.5 V
−0.5
V < V
O
< V
CC
+ 0.5 V
[1]
−20
-
-
-
−75
−65
T
amb
=
−40 °C
to +125
°C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For both TSSOP5 and SC-74A packages: above 87.5
°C
the value of P
tot
derates linearly with 4.0 mW/K.
XC7SET32_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 3 September 2009
3 of 11
NXP Semiconductors
XC7SET32
2-input OR gate
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
∆t/∆V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
Conditions
Min
4.5
0
0
−40
-
Typ
5.0
-
-
+25
-
Max
5.5
5.5
V
CC
+125
20
Unit
V
V
V
°C
ns/V
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IH
V
IL
V
OH
HIGH-level
input voltage
LOW-level
input voltage
Conditions
Min
V
CC
= 4.5 V to 5.5 V
V
CC
= 4.5 V to 5.5 V
2.0
-
25
°C
Typ
-
-
Max
-
0.8
−40 °C
to +85
°C −40 °C
to +125
°C
Unit
Min
2.0
-
Max
-
0.8
Min
2.0
-
Max
-
0.8
V
V
HIGH-level
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
output voltage
I
O
=
−50 µA
I
O
=
−8.0
mA
LOW-level
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
output voltage
I
O
= 50
µA
I
O
= 8.0 mA
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
4.4
3.94
-
-
-
-
-
4.5
-
0
-
-
-
-
-
-
0.1
0.36
0.1
1.0
1.35
4.4
3.8
-
-
-
-
-
-
-
0.1
0.44
1.0
10
1.5
4.4
3.70
-
-
-
-
-
-
-
0.1
0.55
2.0
40
1.5
V
V
V
V
µA
µA
mA
V
OL
I
I
I
CC
∆I
CC
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
additional
per input pin; V
I
= 3.4 V;
supply current other inputs at V
CC
or GND;
I
O
= 0 A; V
CC
= 5.5 V
input
capacitance
C
I
-
1.5
10
-
10
-
10
pF
XC7SET32_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 3 September 2009
4 of 11
NXP Semiconductors
XC7SET32
2-input OR gate
11. Dynamic characteristics
Table 8.
Dynamic characteristics
GND = 0 V. For waveform see
Figure 5.
For test circuit see
Figure 6.
Symbol Parameter
t
pd
propagation
delay
Conditions
Min
A and B to Y;
see
Figure 5;
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF
C
L
= 50 pF
C
PD
per buffer;
power
C
L
= 50 pF; f = 1 MHz;
dissipation
capacitance V
I
= GND to V
CC
t
pd
is the same as t
PLH
and t
PHL
.
Typical values are measured at V
CC
= 5.0 V.
C
PD
is used to determine the dynamic power dissipation P
D
(µW).
P
D
= C
PD
×
V
CC2
×
f
i
+
∑(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V.
[3]
[1]
[2]
25
°C
Typ
Max
−40 °C
to +85
°C −40 °C
to +125
°C
Unit
Min
Max
Min
Max
-
-
-
3.3
4.8
17
6.9
7.9
-
1.0
1.0
-
8.0
9.0
-
1.0
1.0
-
9.0
10
-
ns
ns
pF
[1]
[2]
[3]
XC7SET32_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 3 September 2009
5 of 11
