CTM
Vishay Electro-Films
Megohm Center-Tap Chip Resistor
CHIP
RESISTORS
FEATURES
Product may not
be to scale
•
Wire bondable
•
Resistance range total: 200 kΩ to 10 MΩ
•
Center tap
•
Chip size: 0.040 inches square
The CTM resistor chips extends the resistance range to 10M
in a center tap configuration while keeping the die size
relatively small.
The CTMs are manufactured using Vishay Electro-Films
(EFI) sophisticated thin film equipment and manufacturing
technology. The CTMs are 100 % electrically tested and
visually inspected to MIL-STD-883.
•
Resistor material: Tantalum nitride, self-passivating
•
Moisture resistant
APPLICATIONS
Vishay EFI CTM tapped megohm resistor chips are designed for hybrid packages requiring high value, two resistor combinations.
TEMPERATURE COEFFICIENT OF RESISTANCE, VALUES AND TOLERANCES
Tightest Standard Tolerance Available
PROCESS CODE
0.1 %
± 50 ppm/°C
± 100 ppm/°C
0 to - 250 ppm/°C
0 to - 350 ppm/°C
0.2 %
0.5 %
CLASS H*
100
101
099
098
*MIL-PRF-38534 inspection criteria
CLASS K*
130
131
129
128
200 kΩ
1.0 MΩ
2 MΩ
5 MΩ
10 MΩ
STANDARD ELECTRICAL SPECIFICATIONS
PARAMETER
TCR Tracking Between Resistors
Ratio/Ratio,
R
A
/R
B
: Tolerance
Noise
Moisture Resistance, MIL-STD-202, Method 106
Stability, 1000 h, + 125 °C, 10 mW
Operating Temperature Range
Thermal Shock, MIL-STD-202, Method 107, Test Condition F
High Temperature Exposure, + 150 °C, 100 h
Dielectric Voltage Breakdown
Insulation Resistance
Operating Voltage
DC Power Rating at + 70 °C (Derated to Zero at + 175 °C)
5 x Rated Power Short-Time Overload, + 25 °C, 5 s
± 5 ppm/°C
1 ± 1 % standard
- 12 dB typ.
± 0.5 % max.
ΔR/R
± 0.5 % max. absolute
± 0.005 % ratio
- 55 °C to + 125 °C
± 0.25 % max.
ΔR/R
± 0.5 % max.
ΔR/R
200 V
10
12
min.
100 V max.
20 mW each resistor
± 0.25 % max.
ΔR/R
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80
For technical questions, contact: efi@vishay.com
Document Number: 61034
Revision: 14-Mar-08
CTM
Megohm Center-Tap Chip Resistor
Vishay Electro-Films
DIMENSIONS
in inches
0.040
0.0154
CHIP
RESISTORS
0.036
0.005
0.005
SCHEMATIC
R
T
=
R
A
+
R
B
R
A
R
B
MECHANICAL SPECIFICATIONS
in inches
PARAMETER
Chip Size
Chip Thickness
Chip Substrate Material
Resistor Material
Bonding Pad Size
Number of Pads
Pad Material
Backing
Options:
Gold back for eutectic die attach
Custom ratios available up to 4:1
R
A
/R
B
- consult Vishay EFI Sales
Consult Applications Engineer
0.040 x 0.040 ± 0.002 (1.02 x 1.02 ± 0.05 mm)
0.010 ± 0.002 (0.254 ± 0.05 mm)
Oxidized silicon, 10 kÅ minimum SiO
2
Tantalum nitride, self-passivating
0.005 x 0.005 (0.127 x 0.127 mm)
3
10 kÅ minimum aluminum
None, lapped semiconductor silicon
ORDERING INFORMATION
Example: 100 % visual, 2 MΩ, ± 1 %, ± 100 ppm/°C TCR, aluminum pads, class H visual inspection
W
INSPECTION/
PACKAGING
W = 100 % visually inspected
parts in matrix trays per
MIL-STD-883
X = Sample, visually inspected
parts loaded in matrix
trays (4 % AQL)
CTM
PRODUCT
FAMILY
101
PROCESS
CODE
See Process Code
table
2000
RESISTANCE
VALUE
Use first 4 digits
significant digits of the
resistance (R
T
)
3
MULTIPLIER
CODE
2
= 100
3
= 1000
4
= 10 000
F
TOLERANCE
CODE
B
= 0.1 %
C
= 0.2 %
D
= 0.5 %
F
= 1.0 %
G
= 2.0 %
H
= 2.5 %
J
= 5.0 %
K
= 10 %
Document Number: 61034
Revision: 14-Mar-08
For technical questions, contact: efi@vishay.com
www.vishay.com
81
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
www.vishay.com
1
FPGA/CPLD
