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HS35 Absolute Encoder
Serial Synchronous Interface (SSI)
SSI output provides effective synchronization in
a closed-loop control system. A clock pulse train
from a controller is used to clock out sensor
data: one bit of position data is transmitted to
the controller per one clock pulse received by the
sensor. The use of a differential driver permits
reliable transmission of data over long distances
MSB
in
SPECIFICATION ADDENDUM,
be electrically noisy.
SSI):
environments that may
Serial Synchronous Interface
The
output provides effective synchronization in a closed-loop control system. A clock
SSI
encoder utilizes a clock signal, provided by
pulse train from a controller is used to shift out sensor data: one bit of position data is
the user interface, to
per clock pulse received
transmission.
of a
time the data
by the sensor. The use
transmitted to the controller
LTR
differential
electronics must include an
long distances
data over
Receiving
driver permits reliable transmission ofencoder
appropriate
in
ECO_500
environments that may be electrically noisy. The
utilizes a clock signal,
A
provided by the user interface, to time the data transmission. Receiving electronics must
receiver as well as line terminating resistors.
Output Code and Terminations
Parallel code
SSI Output Termination Table
M18
Conn
DATA +
Interfacing Long Data Lines:
Gray
Code
12 Bit
G
11
G
10
REVISIONS
DESCRIPTION
Natural
Binary
12 Bit
2
11
2
10
2
9
2
8
2
7
2
2
2
6
TerminaTion
TyPe
M14/19
Conn
A
B
C
Cable
Conn
Yel
WHT/Yel
Blu
Cable
WHT/BlK
WHT/BRN
WHT/ReD
APPR
M14/19
Conn
A
B
C
D
e
F
G
H
J
A
H
B
i
DATA-
CloCK+
CloCK-
G
9
G
8
G
7
G
6
G
5
G
4
G
3
2
DATE
4/13/05
WHT/oRN
WHT/Yel
WHT/GRN
WHT/Blu
WHT/Vio
WHT/GRY
Cable impedance creates a transmission delay, shifting the phase relationship between the clock pulse and the data. If this pulse shift exceeds 180 , then the
by the receiver. The maximum allowable clock frequency, therefore, is a function of the cable
length. For 24 AWG, stranded, 3 pair cable (BEI part number 37048-003 or equivalent) the group
delay is 1.36nS/ft. The table below shows the maximum transmission rate allowable as a function
of cable length to ensure a phase shift of less than 90 .
D
R
S
T
V
WHT/Blu
oRN
GRN
BlK
ReD
BARe
500
200
DiR CoNTRol
C
Features :
include an appropriate receiver as well as line terminating resistors. An optional parity
bit is available to validate the transmitted data.
CLOCK: Maximum (KHz) = 92,000/Cable Length (ft)
CASe GRouND
G
F
D
100
•
Synchronous transmission
Features:
•
Transmission lengths to 1000
•
Accepts
compatible
RS422/485
clock rates
Synchronous transmission
Accepts clock rates from
Data Transmission
100 KHz to 1.8 MHz
Sequence
Parity bit option is available
Transmission lengths to 1000 feet
CiRCuiT CoMMoN
+V SuPPlY VolTAGe
Cable Length (feet)
feet
from 100 KHz to 1.8 MHz
2
5
4
SHielD DRAiN
50
1800
—
200
500
—
300
300
1000
100
1. Output driver of the encoder is a MAX 491 transceiver
SSI Compatible Serial Code (S3):
G
2
WHT
K
in transmit mode. The recommended receiver is a MAX
Direction of Count:
Standard is CW increasing when viewed from the shaft end. Pin R is
491 transceiver in receive mode.
G
2
TERM BOARD
Data Transmission
GRY/BlK
l
normally HI (or N/C) and is pulled up internally to +V. To reverse the count direction, Pin R
FUNCTION
CONNECTOR*
CABLE
H38
H40
2.
Sequence:
provides a series of pulses (or differ-
Controller
must be pulled LO (COMMON ).
YEL
lSB
G
2
4
DATA+
A
1
GRY/BRN
M
ential pulse pairs) on
sent with a MAX 491 transceiver in transmit mode. It is
the CLOCK input lines.
WHT/YEL
7
DATA-
7
1. Data from the encoder is
Latch control:
Encoder outputs are active
H
and provide
BLU
continuous parallel position infor-
recommended to use any RS-422/485 compatible receiver and
the
5
CLOCK+
B
2
lSB
3. On the
the RS-422/485 specification
CLOCK
specific voltage provide a termination resistor
first HIGH-to-LOW
for your
transition,
and DATA line length.
GRY/ReD
N
based on
mation when Pin U is
CLOCK-
N/C). Pin U is
I
pulled up
WHT/BLU
to +V. When Pin U is LO
HI (or
internally
8
8
2. The CLOCK signals
its data at
compatible, differential TTL,
and
encoder latches
are RS-422/485
the current position
with 180 Ohm termination
ORN
6
DIRECTION CONTROL
3
(COMMON) the encoder outputs are latched
C
at the logic state that is present when the latch
GRY/oRN
P
0V (CiRCuiT CoMMoN)
1
resistors internal to the encoder. A series of pulses from the controller, on the CLOCK
9
ENABLE
J
9
prepares to transmit.
lines, advances the data.
is applied and will stay
(OPTIONAL)
until Pin U is
D
no longer
WHT/ORN
latched
grounded.
4
RED
3
SUPPLY VOLTAGE (+V)
3. On the first HIGH-to-LOW CLOCK transition, the encoder latches its data at the current
oRN
R
DiReCTioN oF CouNT
4. Controller
prepares
data on the
DATA signal during this transition is a START bit,
position and
reads
to transmit. The
falling edge of the next
F
5
M18 Connector
CIRCUIT
MS3102R18-1P, 10-pin connector
BLK
the encoder body
2
and mates to
is a
COMMON (0V)
on
GRN
1
G
15
which is
cycles.
data to the DATA line on each LOW-to-HIGH clock transition, beginning
clock
always HIGH.
*Connector is a MS3102E18-1P, 10-pin connector on the encoder
GROUND
or can
an MS3106F18-1S connector or can be used with
6
standard cable/connector
BEI
a
GRN
S
CASe GRouND
an MS3106F18-1S
CASE
body and mates tocable
used
in feet, ie. 10 = 10 feet)
cable/connector assembly,
assembly, BEI P/N: 92
connector
(XX =
be
length
with a standard
4. The encoder shifts
with
first bit is a START
data on
is always HIGH.
5. The
the MSB. The controller reads
bit and
the HIGH-to-LOW transiton of the next 12 clock
P/N 924-31186-18XX (Where XX = 10, 20 30 or 50 for a 10, 20, 30, or 50 foot length). This
cycles ending with the LSB. The parity bit (if parity option is specified) is clocked out on
BlK
T
6. Next comes 13
When the
bits beginning with the most
is a logic LOW on
0V (CiRCuiT CoMMoN)
the 14th clock cycle.
data
parity option is used, the 13th bit output
Direction Control: Standard is CW for increasing
the preferred connector
end. Direction Control (Pin C) is normally HIGH (or N/C) and is pulled up internally to the positive supply voltage. To
is
count when viewed from the shaft
for SSI output.
Pin C must be pulled to LO (0V)
a 12 bit Encoder or the
of a
Yel
u
lATCH CoNTRol
significant bit
The sumLSBall data bitsEncoder. parity bit
parity bit.
(MSB)
of
and
13 bit and
with the
is even.
ending
the
5. Parity is even.
M14/19 Connector
is a MS3112E14-19P, 19-pin connector on the encoder body and mates
6. After the last CLOCK LOW-to-HIGH transition, a minimum of 30 microseconds must pass
On
before the
encoders,
the next CLOCK series.
When parity is
12 bit
beginning of
bit 13 is LOW.
to an MS3116J14-19S or equivalent.
ReD
V
+V (SuPPlY VolTAGe)
not ordered, parity is LOW.
SSI Compatible Output with Parity Option Timing Diagram:
—
SHielD DRAiN
BARe
7. After the last CLOCK HIGH-to-LOW transition, a
40us Min
20us Max
1
START OF
Pin P is available for a tri-state option
minimum of 40 microseconds must pass before the
SSi Timing
NEXT CLOCK
beginning of the next CLOCK series.
Ordering SSI :
HOW TO SPECIFY SSI OUTPUT IN THE ENCODER
2
1
1
12
0
0
13
3
Max. Frequency (KHz)
900
interfacing long Data lines
CLOCK+
Parity
Cable impedance can create a transmission delay,
START
START
DATA+
MSB
MSB-1
LSB12
LSB13
(Optional)
BIT
BIT
.812 R .281 Ø C' BORE
in effect, shifting the phase relationship between the
.250 DP
30us Min
.156 Ø THRU
clock pulse and the data. If this phase shift exceeds
Example Model Number:
INDUSTRIAL ENCODER DIVISION
180°, then the wrong bit position will be sampled
BEI TEC
L O G E S , I N C.
Encoder:
H25D - SS - 12GC - S3 - SM18 - S
by the receiver. As a result, the maximum allowable
Avenue | Goleta, CA 93117-2891 |
H N O
968-0782 |
I
Fax: (805) 968-3154
7230 Hollister
Tel: (805)
Specials:
MS Connector Termination
R1 Tether Block and Pin
R2 Tether Arm
To specify
TITLE
clock frequency is a function of the cable length. For
-S = Parity Bit
SSI Output
MS3112E14-19P
SPECIFICATION ADDENDUM
1.00
R.225
MS3112E14-19P
24 AWG, stranded, 3 pair cable (BEI part number
Serial Synchronous Interface (SSI)
TETHER BLOCK
0.50
.50
37048-003 or equivalent) the group delay is 1.36ns/
FSCM NO.
.020
SIZE
FSCM NO.
DWG NO.
TYPE R1 (OPTIONAL)
SIZE
DWG NO.
REV
0.45
INDUSTRIAL ENCODER DIVISION
A
1RB90
ft. The table below shows the maximum transmission
1RB90
A
1.10
924-02087-001
A
924-02087-001
0.2502
0.75
1.42
.45
Ø .203 THRU
BEI
B E I T E C H N O L O G I E S , I N C.
.45 .50
Ø 0.2500
C’Bore Ø .359 x .250 DEEP
rate allowable as a function of cable length to ensure
NONE
SHEET: 2/2
SCALE: NONE
DOWEL PIN
SCALE:
SHEET: 1/2
924-02087-001
.96
a phase shift of less than 90°.
2.50
UNLESS OTHERWISE SPECIFIED
MODEL NUMBER: Use the designation, S3 between the
Code
Format
designation and the
Connector
designation.
Example: H25D-SS-12GC-S3-CW-SM18
1
2
12
13
14
15
.125R
.249
.247
redrawn
KRB
DATE
04/06/05
DIMENSIONS ARE IN INCHES
APPLY AFTER FINISH
TOLERANCES ON
.XX ±.01
.XXX ±.005
CHECKED
ENGR
APPR
dimensions
BEI
63
ANGLES ± 0 30'
REMOVE BURRS AND BREAK ALL
SHARP EDGES .010 MAX
ALL DIA. TO BE WITHIN .010
1.00
R.225
MS3112E14-19P
0.50
MS3112E14-19P
.020
.50
THIS DOCUMENT CONTAINS PROPRIETARY INFORMATION OF
BEI TECHNOLOGIES, INC. ANY REPRODUCTION, USE OR DISCLOSURE
OF THIS DOCUMENT WITHOUT WRITTEN CONSENT OF
BEI TECHNOLOGIES, INC. IS EXPRESSLY PROHIBITED.
0.45
NYLATRON GS
TETHER BLOCK
TYPE R1 (OPTIONAL)
REV
1.10
.45
0.75
A
0.2502
Ø 0.2500
DOWEL PIN
Ø C' BORE
DP
Ø THRU
CLOCK, Maximum (kHz) =
.58
92,000 / Cable Length (ft)CW
1.36
15°
Cable length (ft) 50 100 200 300 500
(typ)
1000
30°(typ)
100
Max Freq (kHz) 1800 900 500 300 200
1.75
.218 Ø THRU
12 PLACES
ON A Ø 3.00 B.C.
Ø 3.50
.81
6.25
Ø 3.50
Ø 1.90
Ø 2.25
15°
.125R
.249
.247
Ø 3.50
.58
.81
6.25
Ø 3.50
.50
1.90
2.25
.388
15°
0.249
0.247
.812 R .281 Ø C' BORE
.250 DP
.156 Ø THRU
1.36
15° (typ)
.83 (REF)
1.450
0.07
1.50
SHAFT PENETRATION
ON BLIND SHAFT UNITS
1.50 MAX, .5 MIN
0.07
1.50
SHAFT PENETRATION
ON BLIND SHAFT UNITS
1.50 MAX, .5 MIN
COLLET
CLAMPING RING
0.54
ENCODER
BORE
1.003
Ø 1.001
Ø 3.50
10-32UNF-2B X .38 DEEP
(3)
Ø .203 THRU
ON A Ø 3.000 B.C.
C’Bore Ø .359 x .250 DEEP
1.75R
1.75
30°(typ)
1.75
.218 Ø THRU
12 PLACES
ON A Ø 3.00 B.C.
15°
(typ)
COLLET
1.125R
CLAMPING RING
.480
0.54
0.31
10-32UNF-2B X .38 DEEP
(3) ON A Ø 3.000 B.C.
.45
.50
Notes
.480
15°
(typ)
.96
TOLERANCES: .XX=±0.01, .XXX=±0.005
.388
.50
0.249
0.247
.83 (REF)
1.The
shaft seal is recommended in virtually all installations. The most com-
mon exceptions are applications requiring a very low starting torque or those
requiring operation at both high temperature and high speed.
2. Output IC’s:
Output IC’s are available as either Line Driver (LD) or NPN
Open Collector (OC) types. Open Collectors require pull-up resistors, resulting
in higher output source impedance (sink impedance is similar to that of line
drivers). In general, use of a Line Driver style output is recommended. Line
Drivers source or sink current and their lower impedance mean better noise
immunity and faster switching times.
Warning:
Do not connect any line
driver outputs directly to circuit common/OV, which may damage the driver.
Unused outputs should be isolated and left floating. Our applications special-
ists would be pleased to discuss your system requirements and the compat-
ibility of your receiving electronics with Line Driver type outputs.
28V/V:
Multi-voltage Line Driver (7272*): 100 mA source/sink. Input voltage
5 to 28 VDC +/- 5% standard (Note: V
out
= V
in
). This driver is TTL compat-
ible when used with 5 volt supply. Supply lines are protected against over-
voltage to 60 volts and reverse voltage. Outputs are short circuit protected
for one minute. Supply current is 120 mA typical (plus load current). This is
the recommended replacement for 3904R and 7406R open collector outputs
1.450
1.75R
.480
with internal pullup resistors. It is also a direct replacement for any 4469,
1.125R
88C30, 8830 or 26LS31 line driver
0.31
28V/5:
Multi-voltage Line Driver (7272*): 100 mA source/sink. Input voltage 5
to 28 VDC +/- 5% standard, internally regulated with 5V (TTL compatible) logic
out. Supply lines are protected against overvoltage to 60 volts and reverse volt-
age. Outputs are short circuit protected for one minute. Supply current is 90 mA
typical (plus load current).
Note:
Limit encoder load to 2.5W max at ambient.
Example at 12 VDC: 2.5W/(+12VDC minus +5VDC) = 357 mA total allowed
current. Consult factory for your specific requirements.
28V/OC:
NPN Open Collector (3904*, 7273*). Current sink of 80 mA max.
Current sourced by external pull- up resistor. Output can be pulled up to volt-
age other than supply voltage (30 V max). Input voltage 5 to 28 VDC
+
/- 5%
standard. Supply current is 120 mA typical. This replaces prior IC’s with
designations of 3904, 7406, 3302, 681 and 689.
3.
Special –S at the end of the model number is used to define a variety of
non-standard features such as special shaft lengths, voltage options, or spe-
cial testing. Please consult the factory to discuss your special requirements.
1.75
Figures
Figure 1
Gray Code
CW Increasing Count Viewing Shaft
CW Increasing Count Viewing Shaft
ETC. THRU LSB (GO)
ETC. THRU LSB (GO)
ONE REVOLUTION
ONE REVOLUTION
Figure 2
Natural Binary
CW Increasing Count Viewing Shaft
ETC. THRU LSB (2
0
CW Increasing Count Viewing Shaft
ETC. THRU LSB (2
0
) )
ONE REVOLUTION
ONE REVOLUTION
* Products manufactured prior to April 2007 used the line driver IC number instead of voltage output in model number.
