XRA1201/1201P
16-BIT I2C/SMBUS GPIO EXPANDER
SEPTEMBER 2011
REV. 1.0.0
GENERAL DESCRIPTION
The XRA1201/1201P is a 16-bit GPIO expander with
After power-up, the
an I
2
C/SMBus interface.
XRA1201 has internal 100K ohm pull-up resistors on
each I/O pin that can be individually enabled. The
XRA1201P has the internal pull-up resistors enabled
upon power-up in case it is necessary for the inputs
to be in a known state.
In addition, the GPIOs on the XRA1201/1201P can
individually be controlled and configured. As outputs,
the GPIOs can be outputs that are high, low or in
three-state mode. The three-state mode feature is
useful for applications where the power is removed
from the remote devices, but they may still be
connected to the GPIO expander.
As inputs, the internal pull-up resistors can be
enabled or disabled and the input polarity can be
inverted. The interrupt can be programmed for
different behaviors.
The interrupts can be
programmed to generate an interrupt on the rising
edge, falling edge or on both edges. The interrupt
can be cleared if the input changes back to its original
state or by reading the current state of the inputs.
The XRA1201/1201P are enhanced versions of other
16-bit GPIO expanders with an I
2
C/SMBus interface.
The XRA1201 is pin and software compatible with the
PCA9535, TCA9535 and MAX7312. The XRA1201P
is pin and software compatible with the CAT9555,
PCA9555, TCA9555, MAX7311 and MAX7318.
The XRA1201/1201P are available in 24-pin QFN
and 24-pin TSSOP packages.
FEATURES
•
1.65V to 3.6V operating voltage
•
16 General Purpose I/Os (GPIOs)
•
5V tolerant inputs
•
Maximum stand-by current of 1uA at +1.8V
•
I
2
C/SMBus bus interface
■
■
■
I
2
C clock frequency up to 400kHz
Noise filter on SDA and SCL inputs
Up to 32 I
2
C Slave Addresses
Internal pull-up resistors
Polarity inversion
Individual interrupt enable
Rising edge and/or Falling edge interrupt
Input filter
Output Level Control
Output Three-State Control
•
Individually programmable inputs
■
■
■
■
■
•
Individually programmable outputs
■
■
•
Open-drain active low interrupt output
•
Pin and software compatible with PCA9535,
TCA9535, MAX7312 (XRA1201)
•
Pin and software compatible with CAT9555,
PCA9555, TCA9555, MAX7311 and MAX7318
(XRA1201P)
•
3kV HBM ESD protection per JESD22-A114F
•
200mA latch-up performance per JESD78B
APPLICATIONS
•
Personal Digital Assistants (PDA)
•
Cellular Phones/Data Devices
•
Battery-Operated Devices
•
Global Positioning System (GPS)
•
Bluetooth
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
•
(510) 668-7000
•
FAX (510) 668-7017
•
www.exar.com
XRA1201/1201P
16-BIT I2C/SMBUS GPIO EXPANDER
F
IGURE
1. XRA1201 B
LOCK
D
IAGRAM
REV. 1.0.0
VCC
(1 .6 5 V – 3 .6 V )
G P IO s
SCL
SDA
A2
A1
A0
IR Q #
G P IO s
I
2
C /
SM Bus
In te rfa c e
G P IO
C o n tro l
R e g is te rs
P0
P1
P2
P3
P4
P5
P6
P7
GND
P8
P9
P10
P11
P12
P13
P14
P15
ORDERING INFORMATION
P
ART
N
UMBER
XRA1201IL24-F
XRA1201IL24TR-F
XRA1201PIL24-F
XRA1201PIL24TR-F
XRA1201IG24-F
XRA1201IG24TR-F
XRA1201PIG24-F
XRA1201PIG24TR-F
P
ACKAGE
QFN-24
QFN-24
QFN-24
QFN-24
TSSOP-24
TSSOP-24
TSSOP-24
TSSOP-24
N
UMBER O
F
GPIO
S
16
16
16
16
16
16
16
16
O
PERATING
T
EMPERATURE
R
ANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
D
EVICE
S
TATUS
Active
Active
Active
Active
Active
Active
Active
Active
N
OTE
:
TR = Tape and Reel, F = Green / RoHS
F
IGURE
2. P
IN
O
UT
A
SSIGNMENTS
IRQ# 1
IRQ#
VCC
SDA
SCL
A1 2
A2 3
18 A0
17 P15
16 P14
15 P13
14 P12
13 P11
7
P6
8
P7
9 10 11 12
GND
P8
P9
P10
P0 4
P1 5
P2 6
P3 7
P4 8
P5 9
P6 10
P7 11
GND 12
XRA1201/
XRA1201P
24-Pin
TSSOP
24 VCC
23 SDA
22 SCL
21 A0
20 P15
19 P14
18 P13
17 P12
16 P11
15 P10
14 P9
13 P8
A2
P0 1
P1 2
P2 3
P3 4
P4 5
P5 6
24 23 22 21 20 19
A1
XRA1201/
XRA1201P
24-Pin QFN
2
XRA1201/1201P
REV. 1.0.0
16-BIT I2C/SMBUS GPIO EXPANDER
PIN DESCRIPTIONS
Pin Description
N
AME
QFN-24 TSSOP-24
T
YPE
P
IN
#
P
IN
#
D
ESCRIPTION
I
2
C INTERFACE
SDA
SCL
IRQ#
A0
A1
A2
GPIOs
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
1
2
3
4
5
6
7
8
10
11
12
13
14
15
16
17
4
5
6
7
8
9
10
11
13
14
15
16
17
18
19
20
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
General purpose I/Os P0-P7. All GPIOs are configured as inputs upon power-
up or after a reset. After power-up or reset, the internal pull-up resistors are
enabled for the XRA1201P. The internal pull-up resistors are disabled for the
XRA1201.
20
19
22
18
23
24
23
22
1
21
2
3
I/O
I
OD
I
I
I
I
2
C-bus data input/output (open-drain).
I
2
C-bus serial input clock.
Interrupt output (open-drain, active LOW).
These pins select the I
2
C slave address. See
Table 1
.
General purpose I/O P8-P15. All GPIOs are configured as inputs upon power-
up or after a reset. After power-up or reset, the internal pull-up resistors are
enabled for the XRA1201P. The internal pull-up resistors are disabled for the
XRA1201.
ANCILLARY SIGNALS
VCC
GND
GND
21
9
Center
Pad
24
12
-
Pwr
Pwr
Pwr
1.65V to 3.6V VCC supply voltage.
Power supply common, ground.
The exposed pad at the bottom surface of the package is designed for thermal
performance. Use of a center pad on the PCB is strongly recommended for ther-
mal conductivity as well as to provide mechanical stability of the package on the
PCB. The center pad is recommended to be solder masked defined with open-
ing size less than or equal to the exposed thermal pad on the package bottom to
prevent solder bridging to the outer leads of the device. Thermal vias must be
connected to GND plane as the thermal pad of package is at GND potential.
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
3
XRA1201/1201P
16-BIT I2C/SMBUS GPIO EXPANDER
1.0 FUNCTIONAL DESCRIPTIONS
1.1
I
2
C-bus Interface
REV. 1.0.0
The I
2
C-bus interface is compliant with the Standard-mode and Fast-mode I
2
C-bus specifications. The I
2
C-bus
interface consists of two lines: serial data (SDA) and serial clock (SCL). In the Standard-mode, the serial clock
and serial data can go up to 100 kbps and in the Fast-mode, the serial clock and serial data can go up to 400
kbps.
The first byte sent by an I
2
C-bus master contains a start bit (SDA transition from HIGH to LOW when SCL is
HIGH), 7-bit slave address and whether it is a read or write transaction. The next byte is the sub-address that
contains the address of the register to access. The XRA120x responds to each write with an acknowledge
(SDA driven LOW by XRA1201/1201P for one clock cycle when SCL is HIGH). The last byte sent by an I
2
C-
bus master contains a stop bit (SDA transition from LOW to HIGH when SCL is HIGH). See
Figures 3
-
5
below. For complete details, see the I
2
C-bus specifications.
F
IGURE
3. I
2
C S
TART AND
S
TOP
C
ONDITIONS
SDA
SCL
S
START condition
P
STOP condition
F
IGURE
4. M
ASTER
W
RITES
T
O
S
LAVE
S
SLAVE
ADDRESS
W
A
COMM AND
BYTE
A
DATA
BYTE
A
P
W h ite b lo c k : h o s t to X R A 1 2 0 x
G re y b lo c k : X R A 1 2 0 x to h o s t
F
IGURE
5. M
ASTER
R
EADS
F
ROM
S
LAVE
S
SLAVE
ADDRESS
W
A
COMMAND
BYTE
A
S
SLAVE
ADDRESS
R
A
nDATA
A
LAST DATA
NA
P
White block: host to XRA120x
Grey block: XRA120x to host
4
XRA1201/1201P
REV. 1.0.0
16-BIT I2C/SMBUS GPIO EXPANDER
I
2
C-bus Addressing
1.1.1
There could be many devices on the I
2
C-bus. To distinguish itself from the other devices on the I
2
C-bus, the
XRA1201/1201P has up to 32 I
2
C slave addresses using the A2-A0 address lines.
Table 1
below shows the
different addresses that can be selected.
T
ABLE
1: I
2
C A
DDRESS
M
AP
A2
GND
GND
GND
GND
VCC
VCC
VCC
VCC
GND
GND
GND
GND
VCC
VCC
VCC
VCC
GND
GND
GND
GND
VCC
VCC
VCC
VCC
GND
GND
GND
GND
VCC
VCC
VCC
VCC
A1
SCL
SCL
SDA
SDA
SCL
SCL
SDA
SDA
SCL
SCL
SDA
SDA
SCL
SCL
SDA
SDA
GND
GND
VCC
VCC
GND
GND
VCC
VCC
GND
GND
VCC
VCC
GND
GND
VCC
VCC
A0
GND
VCC
GND
VCC
GND
VCC
GND
VCC
SCL
SDA
SCL
SDA
SCL
SDA
SCL
SDA
GND
VCC
GND
VCC
GND
VCC
GND
VCC
SCL
SDA
SCL
SDA
SCL
SDA
SCL
SDA
I
2
C A
DDRESS
0x20 (0010 000X)
0x22 (0010 001X)
0x24 (0010 010X)
0x26 (0010 011X)
0x28 (0010 100X)
0x2A (0010 101X)
0x2C (0010 110X)
0x2E (0010 111X)
0x30 (0011 000X)
0x32 (0011 001X)
0x34 (0011 010X)
0x36 (0011 011X)
0x38 (0011 100X)
0x3A (0011 101X)
0x3C (0011 110X)
0x3E (0011 111X)
0x40 (0100 000X)
0x42 (0100 001X)
0x44 (0100 010X)
0x46 (0100 011X)
0x48 (0100 100X)
0x4A (0100 101X)
0x4C (0100 110X)
0x4E (0100 111X)
0x50 (0101 000X)
0x52 (0101 001X)
0x54 (0101 010X)
0x56 (0101 011X)
0x58 (0101 100X)
0x5A (0101 101X)
0x5C (0101 110X)
0x5E (0101 111X)
5
