SFN
Vishay Electro-Films
NiCr Thin Film, Top-Contact Resistor
CHIP
RESISTORS
FEATURES
•
Wire bondable
Product may not
be to scale
•
Chip size: 20 inches square
•
Resistance range: 10
Ω
to 510 kΩ
•
Resistor material: Nichrome
•
Oxidized silicon substrate
The SFN series resistor chips offer a combination of
nichrome stability, good power rating and small size.
The SFNs are manufactured using Vishay Electro-Films
(EFI) sophisticated thin film equipment and manufacturing
technology. The SFNs are 100 % electrically tested and
visually inspected to MIL-STD-883.
•
250 mW power
APPLICATIONS
Vishay EFI SFN resistor chips are widely used in hybrid packages where space is limited. Designed with capacity to handle
substantial power loads, they also have the benefit of nichrome stability.
Recommended for hermetic environments where die is not exposed to moisture.
TEMPERATURE COEFFICIENT OF RESISTANCE, VALUES AND TOLERANCES
Tightest Standard Tolerance Available
0.1 %
PROCESS CODE
CLASS H*
CLASS K*
209
201
203
205
208
200
202
204
*MIL-PRF-38534 inspection criteria
± 10 ppm/°C
± 25 ppm/°C
± 50 ppm/°C
± 100 ppm/°C
20
Ω
50
Ω
100
Ω
1 kΩ
510 kΩ
STANDARD ELECTRICAL SPECIFICATIONS
PARAMETER
Noise, MIL-STD-202, Method 308
100
Ω
- 250 kΩ
< 100
Ω
or > 251 kΩ
Stability, 1000 h, + 125 °C, 50 mW
Operating Temperature Range
Thermal Shock, MIL-STD-202, Method 107, Test Condition F
High Temperature Exposure, + 150 °C, 100 h
Dielectric Voltage Breakdown
Insulation Resistance
Operating Voltage
DC Power Rating at + 70 °C (Derated to Zero at + 175 °C)
5 x Rated Power Short-Time Overload, + 25 °C, 5 s
- 35 dB typ.
- 20 dB typ.
± 0.25 % max.
ΔR/R
- 55 °C to + 125 °C
± 0.25 % max.
ΔR/R
± 0.5 % max.
ΔR/R
200 V
10
12
min.
100 V max.
250 mW
± 0.25 % max.
ΔR/R
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42
For technical questions, contact: efi@vishay.com
Document Number: 61025
Revision: 12-Mar-08
SFN
NiCr Thin Film, Top-Contact Resistor
Vishay Electro-Films
DIMENSIONS
in inches
0.008
CHIP
RESISTORS
0.014
0.020
0.004
0.004
0.004
0.020
TYPICAL RANGE
10
Ω
- 55
Ω
TYPICAL RANGE
56
Ω
- 7.4 kΩ
0.004
TYPICAL RANGE
7.5 kΩ - 510 kΩ
SCHEMATIC
MECHANICAL SPECIFICATIONS
in inches
PARAMETER
Chip Size
Chip Thickness
Chip Substrate Material
Resistor Material
Bonding Pad Size
Number of Pads
Pad Material
Backing
Options:
Aluminum pads
Passivation (thermal set plastic)
Consult Applications Engineer
0.020 x 0.020 ± 0.003 (0.51 x 0.51 ± 0.05 mm)
0.010 ± 0.002 (0.254 ± 0.05 mm)
Oxidized silicon, 10 kÅ minimum SiO
2
Nichrome (passivation optional)
0.004 x 0.004 (0.10 x 0.10 mm)
2
15 kÅ minimum gold
None, lapped semiconductor silicon; Au back optional
ORDERING INFORMATION
Example: 100 % visual, 10 kΩ, ± 1 %, ± 50 ppm/°C TCR, gold pads, class H visual inspection
W
INSPECTION/
PACKAGING
W = 100 % visually inspected
parts in matrix tray per
MIL-STD-883
X = Sample, commercial
visually inspected parts loaded in
matrix trays (4 % AQL)
SFN
PRODUCT
FAMILY
202
PROCESS
CODE
See Process Code
table
1000
RESISTANCE
VALUE
Use the first 4
significant digits
of the resistance
1
MULTIPLIER
CODE
B
= 0.01
A
= 0.1
0
=1
1
= 10
2
= 100
3
= 1000
4
= 10 000
F
TOLERANCE
CODE
B
= 0.1 %
C
= 0.2 %
D
= 0.5 %
F
= 1.0 %
G
= 2.0 %
H
= 2.5 %
J
= 5.0 %
K
= 10 %
*Coating standard
Document Number: 61025
Revision: 12-Mar-08
For technical questions, contact: efi@vishay.com
www.vishay.com
43
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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1
FPGA/CPLD
