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YMF795

APL-2 Automobile sound Player-2

厂商名称:YAMAHA CORPORATION

厂商官网:http://device.yamaha.com/

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YMF795
APL-2
Automobile sound Player-2
Outline
YMF795 is a sound source LSI to reproduce high quality melody and effect sound for in-car product. Yamaha's original
FM synthesizer embedded as a sound source can create various timbres, and also a sequencer embedded can
simultaneously generate up to four sounds with four different timbres without giving load to the controller.
Serial port is prepared as a controller interface, and no restriction of data capacity is present because melody data is
reproduced in real-time through FIFO.
A built-in amplifier to drive the dynamic speaker with 500mW power allows connecting a speaker directly.
This LSI is equipped with an analog-output pin also for the earphone jack.
In addition, supporting the standby mode can reduce the consumption current to 1 µA during the standby.
Features
YAMAHA's original FM sound source function
Built-in sequencer
Capable of producing up to 4 different sounds simultaneously (4 independent timbres available).
500mW output speaker amplifier
Sound quality correcting equalizer circuit
Serial interface
Arbitrary frequency of input clock from 2.685 MHz to 27.853 MHz in 55.93 kHz steps, as well as 2.688, 8.4, 12.6, 14.4,
19.2, 19.68, 19.8, and 27.82 MHz clock inputs
Analog output for earphone
Power-down mode (Typ. 1µA or less)
Supply voltage (Digital and Analog): 3.3V±10 %
24-pin SSOP. The plating of pins is lead-free. (YMF795-EZ)
YAMAHA CORPORATION
YMF795 CATALOG
CATALOG No.:LSI-4MF795A20
2005. 11
YMF795
Contents
■General
Description of YMF795 .................................................................................................................. 3
■Block
Description ......................................................................................................................................... 4
■Pin
Configuration.......................................................................................................................................... 5
■Pin
Description ............................................................................................................................................. 6
■Block
Diagram.............................................................................................................................................. 7
■Register
Map................................................................................................................................................. 8
■Explanation
of Registers............................................................................................................................... 9
□Musical
score data register
.................................................................................................................... 9
□Timbre
data register.............................................................................................................................
14
□Other
control data
................................................................................................................................ 17
■Power-down
control division diagram........................................................................................................ 21
■Explanation
of each bit ............................................................................................................................... 21
■On
Reset ..................................................................................................................................................... 24
■Settings
and Procedure required for a piece generation.............................................................................. 24
■Clock
Frequency Setting............................................................................................................................. 24
■On
Interrupt Sequence ................................................................................................................................ 25
■State
Transition ........................................................................................................................................... 26
■Operation
in FIFO empty condition............................................................................................................ 28
■Reproduction
method assuming occurrence of empty state........................................................................ 28
■Example
of peripheral circuit...................................................................................................................... 29
(1) Circuit diagram and wiring diagram when two power supplies are used: ............................................... 30
(2) Circuit diagram and wiring diagram when one power supply and one voltage regulator IC are used: ... 31
■Volume
level Adjustment in monophonic sound and 4-sound generation ................................................. 33
■Sound
Quality Correction Circuit ............................................................................................................... 35
■Serial
I/F Specifications.............................................................................................................................. 37
■Electrical
Characteristics ............................................................................................................................ 38
■General
description of FM sound generator ............................................................................................... 43
■External
dimensions.................................................................................................................................... 44
-2-
YMF795
■General
Description of YMF795
YMF795 is controlled through the serial interface.
Internal configuration the LSI has is shown below.
Volume, power management, etc.
SDIN
SYNC
SCLK
Serial
interface
Timbre Data
Musical score
data
Timbre
register
Tempo
START/STOP
Timbre allocation
HPOUT
/IRQ
FIFO
32word
Sequencer
FM
Synthesizer
D/A +
Volume
AMP
SPOUT
Data inputted to the serial interface is converted into the parallel data and transferred to each function block according
to its index address.
The musical score data is stored in the 32-word FIFO first and then transferred to the sequencer which interprets data
to control sound generation of the FM synthesizer.
The timbre register is where up to 8 timbre data can be stored.
And, as the sequencer controlling register, registers for start/stop and tempo are provided.
In order to have sound generate, the following controls must be performed to this LSI.
1) Initial status setting (cancellation of power-down, clock selection, etc).
2) Timbre data setting.
3) Writing of the musical score data into FIFO before starting the sequence.
4) To write the next musical score data write before the FIFO becomes empty, and to receive the interrupt signal
from FIFO during reproduction.
(For the details, refer to “Settings and procedure required for a piece generation” (P.24).
-3-
YMF795
■Block
Description
1) Serial interface block
The block receives serial data and then identifies its Index data to send control data to each function block.
2) FIFO block
FIFO temporarily stores musical score data. Musical score data up to 32 can be stored. The musical score data are
processed in the sequencer when they are generated as sounds and those processed are deleted one after another.
When the amount of remaining data amount in FIFO reaches the value or less of register setting (IRQ point), it
outputs an interrupt signal to the outside to request the subsequent musical score data.
3) Sequencer block
When the sequencer receives the START command, it sequentially starts reading the musical score data which have
been stored in FIFO. The processed musical score data are deleted.
4) Timbre register block
The block stores timbre data in this register which can set up to 8 timbres. Settings of this register must be completed
before sound generation. The register is initialized by hardware reset; however, in the following operations, contents
of a register are not cleared, and the value written last is held.
• Software reset (CLR bit of Index32h)
• During power-down mode, and after its cancellation.
5) FM synthesizer block
The block synthesizes and generates timbres according to settings. Four sounds can be generated at the same time.
6) D/A, volume, and amplifier blocks
The output from the synthesizer is D/A-converted, and volume processing is performed. After that, the data is
output from the speaker or the earphone output pin.
-4-
YMF795
■Pin
Configuration
CLK_I
<NC>
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
TESTO
/RST
SDIN
SYNC
SCLK
<NC>
AVSS
VREF
HPOUT
EQ1
EQ2
EQ3
/TESTI
/IRQ
DVDD
DVSS
SPOUT2
SPOUT1
SPVSS
SPVSS
AVDD
AVDD
< 24-pin SSOP TOP VIEW >
-5-
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