DATASHEET
Digital DC/DC PMBus 17A Module
ZL9117M
The ZL9117M is a 17A, variable output, step-down
PMBus-compliant digital power supply. Included in the module
is a high-performance digital PWM controller, power MOSFETs,
an inductor, and all the passive components required for a
highly integrated DC/DC power solution. This power module
has built-in auto-compensation algorithms, which eliminates
the need for manual compensation design work. The ZL9117M
operates over a wide input voltage range and supports an
output voltage range of 0.6V to 3.6V, which can be set by
external resistors or via PMBus. This high-efficiency power
module is capable of delivering 17A. Only bulk input and
output capacitors are needed to finish the design. The output
voltage can be precisely regulated to as low as 0.6V with ±1%
output voltage regulation over line, load, and temperature
variations.
The ZL9117M features auto-compensation, internal soft-start,
auto-recovery overcurrent protection, an enable option, and
prebiased output start-up capabilities.
The ZL9117M is packaged in a thermally enhanced, compact
(15mmx15mm) and low profile (3.5mm) over-molded QFN
package module suitable for automated assembly by standard
surface mount equipment. The ZL9117M is RoHS compliant.
Figure 1
represents a typical implementation of the ZL9117M.
For PMBus operation, it is recommended to tie the Enable pin
(EN) to SGND.
Features
• Complete digital switch mode power supply
• Fast transient response
• Auto compensating PID filter
• External synchronization
• Output voltage tracking
• Current sharing
• Programmable soft-start delay and ramp
• Overcurrent/undercurrent protection
• PMBus compliant
Applications
• Server, telecom, and datacom
• Industrial and medical equipment
• General purpose point of load
Related Literature
•
AN2034,
“Configuring Current Sharing on the ZL2004 and
ZL2006”
V
DRV
4.5V TO 6.5V
10µF
16V
4.7µF
16V
4.7µF
16V
10µF
16V
V
IN
4.5V TO 13.2V
CIN
VDRV
VDD
VIN
(EPAD)
VOUT
(EPAD)
ZL9117M
DDC
SCL
I C/SMBus
2
VR
POWER GOOD OUTPUT
ENABLE
EXT SYNC
DDC BUS
PG
EN
V25
V
OUT
SYNC
SW
(EPAD)
PGND
(EPAD)
FB+
FB-
COUT
RTN
SDA
SA
SGND
VTRK
VSET
R
SET
R
SA
FIGURE 1. A COMPLETE DIGITAL SWITCH MODE POWER SUPPLY, ONLY BULK INPUT AND OUTPUT CAPACITORS ARE REQUIRED TO FINISH THE
DESIGN
December 16, 2014
FN7914.4
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Copyright Intersil Americas LLC 2011-2014. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ZL9117M
Table of Contents
Related Literature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
ZL9117M Internal Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Typical Application - Single Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Typical Performance Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Derating Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I2C/SMBus Communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Soft-start Delay and Ramp Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-Good . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Frequency and PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Loop Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Adaptive Diode Emulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Overvoltage Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Prebias Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I2C/SMBus Module Address Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital-DC Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Phase Spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage Tracking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Fault Spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Active Current Sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Phase Adding/Dropping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Monitoring via I2C/SMBus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Snapshot Parameter Capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Non-Volatile Memory and Device Security Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Layout Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Consideration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCB Layout Pattern Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Vias. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stencil Pattern Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
11
11
11
11
12
12
12
12
12
13
13
14
14
14
15
15
15
16
16
16
17
17
17
18
18
19
19
19
19
PMBus Command Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
PMBus™ Data Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Firmware Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
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December 16, 2014
ZL9117M
Pin Configuration
ZL9117M
(21 LD QFN)
TOP VIEW
SGND
SYNC
DDC
SCL
PG
VR
EN
SA
9
PGND
V25
VDD
10
11
12
8
7
6
5
4
3
2
1
21
20
19
SDA
VSET
VTRK
FB+
VDRV
13
18
FB-
SW
14
VIN
15
PGND
16
VOUT
17
Pin Descriptions
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14 (epad)
15 (epad)
16 (epad)
17 (epad)
18
19
20
21
LABEL
SDA
SCL
SA
SYNC
PG
EN
DDC
VR
SGND
PGND
V25
VDD
VDRV
SW
VIN
PGND
VOUT
FB-
FB+
VTRK
VSET
TYPE
I/O
I/O
I
I/O
O
I
I/O
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
I
I
I
I
DESCRIPTION
Serial data. A pull-up resistor is required for this application.
Serial clock. A pull-up resistor is required for this application.
Serial address select pin. Used to assign unique SMBus address to each module.
Clock synchronization. Used for synchronization to external frequency reference.
Power-good output.
Enable input (factory setting active high). Pull-up to enable PWM switching and pull-down to disable PWM switching.
Digital-DC bus (open drain). Interoperability between Intersil digital modules. A pull-up resistor is required for this
application.
Internal 5V reference used to power internal drivers. Connect 4.7μF bypass capacitor to this pin.
Signal ground. Connect to low impedance ground plane.
Power ground. Connect to low impedance ground plane.
Internal 2.5V reference used to power internal circuitry. Connect 4.7μF bypass capacitor to this pin.
Input supply voltage for controller. Connect 4.7μF bypass capacitor to this pin.
Power supply for internal FET drivers. Connect 10μF bypass capacitor to this pin.
Drive train switch node.
Power supply input FET voltage.
Power ground. Connect to low impedance ground plane.
Power supply output voltage. Output voltage from PWM.
Output voltage feedback. Connect to load return of ground regulation point.
Output voltage feedback. Connect to output regulation point.
Tracking sense input. Used to track an external voltage source.
Output voltage selection pin. Used to set V
OUT
set point and V
OUT
max.
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FN7914.4
December 16, 2014
ZL9117M
Ordering Information
PART NUMBER
(Notes
1, 2, 3)
ZL9117MIRZ
ZL9117MAIRZ
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Intersil plastic packaged products are RoHS compliant by EU exemption 7C-I and employ special Pb-free material sets, molding compounds/die
attach materials, and 100% matte tin plate plus anneal (e3) termination finish which is compatible with both SnPb and Pb-free soldering operations.
Intersil RoHS compliant products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
3. For Moisture Sensitivity Level (MSL), please see product information page for
ZL9117M.
For more information on MSL please see Tech Brief
TB363.
4. See
“Firmware Revision History” on page 55;
only the latest firmware revision is recommended for new designs.
PART
MARKING
ZL9117M
ZL9117M
FIRMWARE REVISION
(Note
4)
FC04
FC05
TEMP RANGE
(°C)
-40 to +85
-40 to +85
PACKAGE
(RoHS Compliant)
21 Ld 15x15 QFN
21 Ld 15x15 QFN
PKG.
DWG. #
L21.15x15
L21.15x15
ZL
DIGITAL MODULE DESIGNATOR
BASE PART NUMBER
FIRMWARE REVISION
BLANK: FC04
A: FC05
xxxxM
F
T
R
Z
S
SHIPPING OPTION
BLANK: BULK
T: TAPE AND REEL
RoHS
Z: RoHS COMPLIANT
OPERATING TEMPERATURE
I: INDUSTRIAL (‐ 40°C TO +85°C)
PACKAGE DESIGNATOR
R: QUAD FLAT NO‐LEAD (QFN)
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December 16, 2014
ZL9117M
ZL9117M Internal Block Diagram
VDRV
FB
VIN
GH
PWMH
BST
PWML
SW
0.22µH
VOUT
VDD
VTRK
VSET
PG
SS
MGN
EN
LDO
LDO
OV/UV POWER MANAGEMENT
OC/UC
CURRENT SHARE
INTERLEAVE
AUTOCOMP
VDRV
SYNC
PLL
D-PWM
NVM
GATE DRIVE LOGIC
SYNC
OUT
V25
VR
SW
GL
GND
SUPERVISOR
NLR
DIGITAL
COMPENSATOR
POWER STAGE
GATE DRIVER
PROTECTION
CSA
22
SCL
SDA
DDC
SA
ADC
TEMP
SENSOR
SGND
DGND
DIGITAL CONTROLLER
PGND
SGND
COMMUNICATION
VDD
VDRV
ADC
VSA
22
FB-
FB+
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FN7914.4
December 16, 2014
