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ZLR16300S2002G

Z8 Low Voltage ROM MCUs with Infrared Timers

器件类别:嵌入式处理器和控制器    微控制器和处理器   

厂商名称:Zilog, Inc.

厂商官网:https://www.zilog.com/

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
Zilog, Inc.
零件包装代码
SOIC
包装说明
SOP, SOP20,.4
针数
20
Reach Compliance Code
compli
具有ADC
NO
地址总线宽度
位大小
8
CPU系列
Z8
最大时钟频率
8 MHz
DAC 通道
NO
DMA 通道
NO
外部数据总线宽度
JESD-30 代码
R-PDSO-G20
JESD-609代码
e3
长度
12.875 mm
I/O 线路数量
16
端子数量
20
最高工作温度
70 °C
最低工作温度
PWM 通道
NO
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装等效代码
SOP20,.4
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
260
电源
2/3.6 V
认证状态
Not Qualified
RAM(字节)
237
ROM(单词)
2048
ROM可编程性
MROM
座面最大高度
2.65 mm
速度
8 MHz
最大压摆率
5 mA
最大供电电压
3.6 V
最小供电电压
2 V
标称供电电压
3 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子面层
MATTE TIN
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
40
宽度
7.5 mm
uPs/uCs/外围集成电路类型
MICROCONTROLLER
文档预览
Crimzon
TM
ZLR16300
Z8 Low Voltage ROM MCUs
with Infrared Timers
Product Specification
PS021413-1205
ZiLOG Worldwide Headquarters • 532 Race Street • San Jose, CA 95126-3432
Telephone: 408.558.8500 • Fax: 408.558.8300 •
www.ZiLOG.com
This publication is subject to replacement by a later edition. To determine whether a later edition
exists, or to request copies of publications, contact:
ZiLOG Worldwide Headquarters
532 Race Street
San Jose, CA 95126-3432
Telephone: 408.558.8500
Fax: 408.558.8300
www.zilog.com
ZiLOG is a registered trademark of ZiLOG Inc. in the United States and in other countries. All other products and/or
service names mentioned herein may be trademarks of the companies with which they are associated.
Document Disclaimer
©2005 by ZiLOG, Inc. All rights reserved. Information in this publication concerning the devices, applications, or
technology described is intended to suggest possible uses and may be superseded. ZiLOG, INC. DOES NOT
ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION, DEVICES,
OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZiLOG ALSO DOES NOT ASSUME LIABILITY FOR
INTELLECTUAL PROPERTY INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION, DEVICES,
OR TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. Devices sold by ZiLOG, Inc. are covered by warranty
and limitation of liability provisions appearing in the ZiLOG, Inc. Terms and Conditions of Sale. ZiLOG, Inc. makes no
warranty of merchantability or fitness for any purpose. Except with the express written approval of ZiLOG, use of
information, devices, or technology as critical components of life support systems is not authorized. No licenses are
conveyed, implicitly or otherwise, by this document under any intellectual property rights.
Disclaimer
PS021413-1205
Crimzon
TM
ZLR16300
Product Specification
iii
Revision History
Each instance in
Table 1
reflects a change to this document from its previous revi-
sion. To see more detail, click the appropriate link in the table.
Table 1. Revision History of this Document
Revision
Level
Date
Description
Page#
December 07
2004
Changed low power consumption and current usage for STOP and HALT 1, 2, 8
modes, removed mask option note, and added characterization data to
Table 7.
Removed Preliminary designation
All
1, 12
January
2005
08
Changed low power consumption value to 5mW. Changed STOP and
HALT mode current values to 1.3μA and 0.5mA respectively. Changed
V
CC
Low Voltage Protection typical rating to 1.8V.
Clarified Port 1 reserved address status by removing Port 1 in Figure 1
and adding a note in Figure 12. Reference CR5843.
Added 1K and 2K parts.
Added caution to
Input/Output Ports on page 12
. Updated
Ordering
Information on page 80
.
Updated
Ordering Information on page 80
.
Updated the Section
Input output port
and Clock.
April 2005 09
June 2005 10
August
2005
11
3, 21
All
September 12
2005
December 13
2005
12, 47
PS021413-1205
Crimzon
TM
ZLR16300
Product Specification
iv
Table of Contents
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Standard Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
XTAL1 Crystal 1 (Time-Based Input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
XTAL2 Crystal 2 (Time-Based Output) . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input/Output Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Expanded Register File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Register File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Counter/Timer Functional Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stop-Mode Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Watchdog Timer Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low Voltage Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
12
12
12
19
19
19
21
24
25
26
34
44
47
48
49
50
56
59
Expanded Register File Control Registers (0D) . . . . . . . . . . . . . . . . . . . . . . . . 60
Expanded Register File Control Registers (0F) . . . . . . . . . . . . . . . . . . . . . . . . . 65
Standard Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Part Number Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
PS021413-1205
Table of Contents
Crimzon
TM
ZLR16300
Product Specification
v
List of Figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Functional Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Counter/Timers Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
20-Pin DIP/SOIC/SSOP Pin Configuration . . . . . . . . . . . . . . . . . . . . 5
28-Pin DIP/SOIC/SSOP Pin Configuration . . . . . . . . . . . . . . . . . . . . 6
Test Load Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
AC Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Port 0 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Port 2 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Port 3 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Port 3 Counter/Timer Output Configuration . . . . . . . . . . . . . . . . . . . 18
Program Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Expanded Register File Architecture . . . . . . . . . . . . . . . . . . . . . . . . 22
Register Pointer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Register Pointer—Detail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Glitch Filter Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Transmit Mode Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8-Bit Counter/Timer Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
T8_OUT in Single-Pass Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
T8_OUT in Modulo-N Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Demodulation Mode Count Capture Flowchart . . . . . . . . . . . . . . . . 38
Demodulation Mode Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
16-Bit Counter/Timer Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
T16_OUT in Single-Pass Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
T16_OUT in Modulo-N Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Ping-Pong Mode Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Output Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Interrupt Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Oscillator Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Port Configuration Register (PCON) (Write Only) . . . . . . . . . . . . . . 49
Stop Mode Recovery Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
SCLK Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Stop Mode Recovery Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Stop Mode Recovery Register 2 ((0F) DH:D2–D4, D6 Write Only) . 55
Watch-Dog Timer Mode Register (Write Only) . . . . . . . . . . . . . . . . 56
PS021413-1205
List of Figures
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