本文提出了一种基于新型双环路拓扑结构的无电容器低压降（LDO）线性稳压器。 调节器利用反馈回路来满足助听器的挑战，包括快速的瞬态性能和在负载电流快速变化下的小电压尖峰。 拟议的设计无需在输出端连接片外分立电容器即可工作，并且可在0-100 pF的电容负载下工作。 该设计已通过0.18μmCMOS工艺实现。 拟议的稳压器组件数量少，适合于片上系统集成。 它通过1.0 V-1.4 V电源将输出电压调节为0.9V。 当CL = 0时，在250V至500μA的电流阶跃负载下，边沿时间（上升和下降时间）为1ns，ΔVout为64mV，建立时间为3μs。1kHz时的电源抑制比（PSRR）为 63分贝。

This paper presents a capacitor-free low dropout(LDO) linear regulator based on a new dual loop topology. Theregulator utilizes the feedback loops to satisfy the challenges forhearing aid devices, which include fast transient performanceand small voltage spikes under rapid load-current changes. Theproposed design works without the need of an off-chip discretecapacitor connected at the output and operates with 0-100 pFcapacitive load. The design has been implemented in a 0.18 μmCMOS process. The proposed regulator has a low componentcount and is suitable for system-on-chip integration. It regulatesthe output voltage at 0.9 V from 1.0 V - 1.4 V supply. A currentstep load from 250-500 μA with an edge time (rise and fall time)of 1 ns results at ?Vout of 64 mV with a settling time of 3 μswhen CL = 0. The power supply rejection ratio (PSRR) at 1 kHzis 63 dB.