采用CPLD实现了快速低开关损耗的优化后的SVPWM算法

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36 2002 6 12 CPLD Power Electronics SVPWM Vol 36 No 6 December 2002 310027 AL TERA Maxplus ACEX SVPWM Kohonen CPLD TP332 1 A 1000 100X2002 06 0061 03 Complex Programmale Logic Device Applied to Optimized SVPWM Algorithm L I Ming feng L IN Ping ZHAN G Zhong chao Zhejiang U niversity Hangz hou 310027 China Abstract This paper introduces the new CPLD devices e g AL TERA s ACEX chip and EDA tool Maxplus phase voltage inverter is complemented which takes the ad Using the......