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74191 pdf datasheetpdf
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2013-09-20 | 1积分 | 129.87KB |  0 次下载

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标签: 74191

74191

datasheet

datasheet

54191/DM54191/DM74191 Synchronous Up/Down4-Bit Binary Counter with Mode ControlGeneral Des criptionThis circuit is a synchronous, reversible, up/down counter.The 191 is a 4-bit binary counter. Synchronous operation isprovided by having all flip-flops clocked simultaneously sothat the outputs change simultaneously when so instructedby the steering logic. This mode of operation eliminates theoutput counting spikes normally associated with asynchronous(ripple clock) counters.The outputs of the four master-slave flip-flops are triggeredon a low-to-high level transition of the clock input, if theenable input is low. A high at the enable input inhibits counting.Level changes at either the enable input or the down/up input should be made only when the clock input is high.The direction of the count is determined by the level of thedown/up input. When low, the counter counts up and whenhigh, it counts down.This counter is fully programmable; that is, the outputs maybe preset to either level by placing a low on the load inputand entering the desired data at the data inputs. The outputwill change independent of the level of the clock input. Thisfeature allows the counters to be used as modulo-N dividersby simply modifying the count length with the preset inputs.The clock, down/up, and load inputs are buffered to lowerthe drive requirement; which significantly reduces the numberof clock drivers, etc., required for long parallel words.Two outputs have been made available to perform the cascadingfunction: ripple clock and maximum/minimum count.The latter output produces a high-level output pulse with aduration approximately equal to one complete cycle of theclock when the counter overflows or underflows. The rippleclock output produces a low-level output pulse equal inwidth to the low-level portion of the clock input when anoverflow or underflow condition exists. The counters can beeasily cascaded by feeding the ripple clock output to theenable input of the succeeding counter if parallel clocking isused, or to the clock input if parallel enabling is used. Themaximum/minimum count output can be used to accomplishlook-ahead for high-speed operation.FeaturesY Single down/up count control lineY Count enable control inputY Ripple clock output for cascadingY Asynchronously presettable with load controlY Parallel outputsY Cascadable for n-bit applicationsY Alternate Military/Aerospace device (54191) is available.Contact a National Semiconductor Sales Office/Distributor for specifications.

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