The DS90CF363B transmitter converts 21 bits of CMOS/TTLdata into three LVDS (Low Voltage Differential Signaling)data streams. A phase-locked transmit clock is transmitted inparallel with the data streams over a fourth LVDS link. Everycycle of the transmit clock 21 bits of input data are sampledand transmitted. At a transmit clock frequency of 65 MHz, 18bits of RGB data and 3 bits of LCD timing and control data(FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455Mbps per LVDS data channel. Using a 65 MHz clock, thedata throughput is 170 Mbytes/sec. The DS90CF363B isfixed as a Falling edge strobe transmitter and will interoperatewith a Falling edge strobe Receiver (DS90CF366) withoutany translation logic.