下载中心
TISP61089 pdf,TISP61089 datasheet (DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGpdf
1星 发布者: csdn_can

2013-09-22 | 1积分 | 418.58KB |  0 次下载

下载 收藏 评论

文档简介
标签: pdf

pdf

datasheet

datasheet

The TISP61089 is a dual forward-conductingbuffered p-gate overvoltage protector. It isdesigned to protect monolithic SLICs (SubscriberLine Interface Circuits) against overvoltages onthe telephone line caused by lightning, a.c.power contact and induction. The TISP61089 limits voltages that exceed the SLIC supply rail voltage. TheTISP61089 parameters are specified to allow equipment compliance with Bellcore GR-1089-CORE, Issue 1.The SLIC line driver section is typically powered from 0 V (ground) and a negative voltage in the region of-10 V to -75 V. The protector gate is connected to this negative supply. This references the protection(clipping) voltage to the negative supply voltage. As the protection voltage will then track the negative supplyvoltage the overvoltage stress on the SLIC is minimised.Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initiallyclipped close to the SLIC negative supply rail value. If sufficient current is available from the overvoltage, thenthe protector will crowbar into a low voltage on-state condition. As the overvoltage subsides the high holdingcurrent of the crowbar prevents d.c. latchup.The TISP61089 is intended to be used with a series combination of a 25 W or higher resistance and a suitableovercurrent protector. Power fault compliance requires the series overcurrent element to open-circuit orbecome high impedance (see Applications Information). For equipment compliant to ITU-T recommendationsK20 or K21 only, the series resistor value is set by the power cross requirements. For K20 and K21, aminimum series resistor value of 10 W is recommended.These monolithic protection devices are fabricated in ion-implanted planar vertical power structures for highreliability and in normal system operation they are virtually transparent. The TISP61089 buffered gate designreduces the loading on the SLIC supply during overvoltages caused by power cross and induction. TheTISP61089 is available in 8-pin plastic small-outline surface mount package and 8-pin plastic dual-in-linepackage.

评论
相关视频
  • littlefulse 多元新技术赋能安全可靠和高效

  • cadence allegro 快速入门实战100讲

  • PSpice简单入门教程

  • 集成电路版图设计技术

  • Digital VLSI Design (RTL to GDS)

  • Altium Designer常见问题解答500例视频合集

推荐帖子
精选电路图
  • PIC单片机控制的遥控防盗报警器电路

  • 使用ESP8266从NTP服务器获取时间并在OLED显示器上显示

  • 带有短路保护系统的5V直流稳压电源电路图

  • 如何构建一个触摸传感器电路

  • 如何调制IC555振荡器

  • 基于ICL296的大电流开关稳压器电源电路

×