The CD4094BC consists of an 8-bit shift register and a3-STATE 8-bit latch. Data is shifted serially through theshift register on the positive transition of the clock. The outputof the last stage (QS) can be used to cascade severaldevices. Data on the QS output is transferred to a secondoutput, Q′S, on the following negative clock edge.The output of each stage of the shift register feeds a latch,which latches data on the negative edge of the STROBEinput. When STROBE is HIGH, data propagates throughthe latch to 3-STATE output gates. These gates areenabled when OUTPUT ENABLE is taken HIGH.Features
Wide supply voltage range: 3.0V to 18V
High noise immunity: 0.45 VDD (typ.)
Low power TTL compatibility:Fan out of 2 driving 74L