Design of PLLs[1]Design of Monolithic PLLMeng Chih Weng 2006.7.26Outline The PLL introduction & considerations Voltage-controlled oscillators PFD & charge pump & divider PLL jitter considerations Measurement Delay Locked LoopP.2STC MCWengThe PLL Introduction & Considerations PLL Architecture Why Phase Lock Charge-Pumped PLL PLL Parameters & BandwidthP.3STC MCWengPLL ArchitectureFeedback: Vin(t)+ACPVout(t)PLL: Φ in(t)UPIpPFD DNIpVCR C1VCOC2Φ out(t) PFD: Phase/frequency Detector CP: Charge pump VCO: Voltage-Controlled Oscillator Only phase information is important to PLL operationP.4 STC MCWengThe PLL Introduction & Considerations PLL Architecture Why Phase Lock Jitter Reduction Skew Suppression Frequency Synthesis Clock Recovery Char……