The I2C (Inter-IC) bus has become a popular serial bus architecturewhich needs to be understood for proper implementation. On thehardware level, I2C is a collection of microcomputers with integratedI2C port (Philips PCD33xx, PCF84Cxxx, and many of their 80(C)51family derivatives, plus mCs from several other manufacturers), anda peripheral set (LCD/LED drivers, RAM, ROM, E2PROM,Clock/Calendars, I/O, A/D, D/A, IR transcoders, frequencysynthesizers, audio processors, telephony ICs and various tuningICs for TV/radio). These devices all communicate serially over atwo-wire bus, serial data (SDA) and serial clock (SCL). The I2Cstructure is optimized for hardwire simplicity. Parallel address anddata buses inherent in conventional systems are replaced by aserial protocol that transmits both address and bidirectional dataover a 2-wire bus. This means that interconnecting wires arereduced to a minimum; only VDD, ground, and the two-wire bus arerequired to link the controller(s) with the peripherals or othercontrollers. This results in reduced IC size, reduced pin count, andsimpler interconnections. An I2C system is therefore smaller,simpler, and cheaper to implement than its parallel counterpart.