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实时时钟补偿(Real Time Clock Compensation)pdf
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2013-09-19 | 1积分 | 82.89KB |  0 次下载

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标签: Compensation

Compensation

Real Time Clock Compensation This document describes how to use software to compensate the real time clock (RTC) in Teridian meter chips. The sample code discussed is from the demonstration code for the 71M6521F, but similar principles may be used with the 71M6511, 71M6513 and other Teridian Meter products. The Challenge The real-time clock (RTC) in Teridian energy meter chips is based on the external crystal connected to the XIN and XOUT pins of the on-chip oscillator. Most uses require accuracy that is better than an uncompensated clock crystal can provide. Commercially available crystals will have a slight deviation from the target frequency at room temperature. In addition, the crystal frequency will change with temperature following a quadratic function. There-fore, practical clocks require some sort of compensation to get adequate accuracy. The RTC in the 71M6521D/F The real-time clock in Teridian energy meter chips provided on-chip in the 71M6521D and 71M6521F chips con-sists of an oscillator and divider chain that keeps track of the current time of day and date, as long as main power or battery power is applied to the chip. Once set, the RTC tracks real time and date at the accuracy provided by the external 32kHz oscillator. The hardware of the 71M6521 permits the seconds counter to be corrected by incrementing or decrementing it using the RTC_INC_SEC or RTC_DEC_SEC registers of the I/O RAM. Theory of Operation Teridian offers a solution that uses software to compensate the RTC, permitting quadratic compensation for temperature-induced drift. This solution is purely digital, with excellent accuracy and stability. It saves space on the integrated circuit, providing very good value compared to more expensive solutions, such as temperature-compensated oscillators, digital drift compensation logic, or programmable loading capacitors. The digital compensation uses the RTC_INC_SEC or RTC_DEC_SEC registers of the I/O RAM to occasionally correct the seconds counter. This correction occurs when the calculated deviation of the clock has reached one second. The compensation code continuously adds up the fractional error, until it equals a second, and then adds or subtracts one second of error to or from the RTC by incrementing or decrementing the seconds counter. This mode of operation is shown in Figure 1. While this compensation methods works fine, it is better to correct the RTC when the error exceeds ½ seconds. That way, the deviation from ideal time is always less than 500ms (see Figure 2).

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