The CY7C1041B is a high-performance CMOS static RAM organizedas 262,144 words by 16 bits.Writing to the device is accomplished by taking Chip Enable(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), iswritten into the location specified on the address pins (A0through A17). If Byte High Enable (BHE) is LOW, then datafrom I/O pins (I/O8 through I/O15) is written into the locationspecified on the address pins (A0 through A17).Reading from the device is accomplished by taking Chip Enable(CE) and Output Enable (OE) LOW while forcing the WriteEnable (WE) HIGH. If Byte Low Enable (BLE) is LOW, thendata from the memory location specified by the address pinswill appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW,then data from memory will appear on I/O8 to I/O15. See thetruth table at the back of this data sheet for a complete des criptionof read and write modes.The input/output pins (I/O0 through I/O15) are placed in ahigh-impedance state when the device is deselected (CEHIGH), the outputs are disabled (OE HIGH), the BHE and BLEare disabled (BHE, BLE HIGH), or during a write operation (CELOW, and WE LOW).The CY7C1041B is available in a standard 44-pin400-mil-wide body width SOJ and 44-pin TSOP II packagewith center power and ground (revolutionary) pinout.