High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support.For full-speed USB devices the operating frequency was low enough to allow data recovery to be handledin a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USBsignaling requirements. Today s gate arrays operate comfortably between 30 and 60 MHz. With USB 2.0signaling running at hundreds of MHz, the existing design methodology must change.