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Guidelines for Designing High-Speed FPGA PCBspdf
1星 发布者: lamaba

2013-09-20 | 1积分 | 2.04MB |  0 次下载

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文档简介
标签: Guidelines

Guidelines

for

for

Designing

Designing

HighSpeed

HighSpeed

FPGA

FPGA

PCBs

PCBs

Over the past five years, the development of true analog CMOS processeshas led to the use of high-speed analog devices in the digital arena.System speeds of 150 MHz and higher have become common for digitallogic. Systems that were considered high end and high speed a few yearsago are now cheaply and easily implemented. However, this integrationof fast system speeds brings with it the challenges of analog systemdesign to a digital world. This document is a guideline for printed circuitboard (PCB) layouts and designs associated with high-speed systems.“High speed” does not just mean faster communication rates (e.g., fasterthan 1 gigabit per second (Gbps)). A transistor-transistor logic (TTL)signal with a 600-ps rise time is also considered a high-speed signal. Thisopens up the entire PCB to careful and targeted board simulation anddesign. The designer must consider any discontinuities on the board. The“Time-Domain Reflectometry” and “Discontinuity” sections explain howto eliminate discontinuities on a PCB. Some sources of discontinuities arevias, right angled bends, and passive connectors.The “Termination” section explains about terminations for signals onPCBs. The placement and selection of termination resistors are critical inorder to avoid reflections.As systems require higher speeds, they use differential signals instead ofsingle-ended signals because of better noise margins and immunity.Differential signals require special attention from PCB designers withregards to trace layout. The “Trace Layout” section addresses differentialtraces in terms of trace layout. Crosstalk, which can adversely affectsingle ended and differential signals alike, is also addressed in thissection.All the dense, high-speed switching (i.e., hundreds of I/O pins switchingat rates faster than 500-ps rise and fall times) produces powerful transientchanges in power supply voltage. These transient changes occur becausea signal switching at higher frequency consumes a proportionally greateramount of power than a signal switching at a lower frequency. As aresult, a device does not have a stable power reference that both analogand digital circuits can derive their power from. This phenomenon iscalled simultaneous switching noise (SSN). The “Dielectric Material”section discusses how to eliminate some of these SSN problems throughcareful board design.

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