DM74LS90/DM74LS93Decade and Binary CountersGeneral Des criptionEach of these monolithic counters contains four masterslaveflip-flops and additional gating to provide a divide-bytwocounter and a three-stage binary counter for which thecount cycle length is divide-by-five for the 'LS90 and divideby-eight for the 'LS93.All of these counters have a gated zero reset and the LS90also has gated set-to-nine inputs for use in BCD nine's complementapplications.To use their maximum count length (decade or four bit binary),the B input is connected to the QA output. The inputcount pulses are applied to input A and the outputs are asdescribed in the appropriate truth table. A symmetrical divide-by-ten count can be obtained from the 'LS90 countersby connecting the QD output to the A input and applying theinput count to the B input which gives a divide-by-ten squarewave at output QA.FeaturesY Typical power dissipation 45 mWY Count frequency 42 MHz