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高性能存储器测试设计原理,故障建模与自检rar
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2013-09-22 | 1积分 | 18.37MB |  1 次下载

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标签: 高性能存储器测试设计原理

高性能存储器测试设计原理

故障建模与自检

高性能存储器测试设计原理

The idea for this book first lodged in my mind approximately five yearsago. Having worked on the design of advanced memory built-in self-testsince 1988, I saw a need in the industry and a need in the literature. Certainfallacies had grown up and the same mistakes were frequently beingrepeated. Many people “got away with” these mistakes. As the nextgeneration of chips was produced, however, the large number of bits on achip made the fruit of these mistakes very evident and the chip qualitysuffered as a result.Memory test, memory design, and memory self test are each intriguingsubjects. Sinking my teeth into a new memory design article in the Journalof Solid State Circuits is a privilege. Sitting through a clear presentation atthe International Test Conference on memory testing can provide food forthought about new ways that memories can fail and how they can be tested.Reviewing a customer’s complex memory design and generating an efficientself-test scheme is the most enjoyable work I do. Joining my colleagues atthe IEEE Memory Technology, Design, and Test Workshop provides somereal memory camaraderie. I hope that the reader will gain some insight fromthis book into the ways that memories work and the ways that memories fail.It is a fascinating area of research and development.The key message of this book is that we need to understand the memoriesthat we are testing. We cannot adequately test a complex memory withoutfirst understanding its design. Comprehending the design and the test of amemory allows the best memory built-in self-test capabilities. These areneeded now and will be needed even more in the future.This book is in many ways the culmination of 20 years experience in theindustry. Having worked in memory design, memory reliability development, and most significantly in memory self test, has allowed me tosee memories in a different light. In each role, the objective has been togenerate robust, defect-free memories. Memory self test has grown frominfancy in the mid 1980s, when even its worth was questioned, to become arelied upon contributor to memory quality and satisfied chip customers.

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