The device has a low cost, on-chip VCO that locks to either8´ or 16´ the frequency at the 19.44 MHz or 9.72 MHz input.No external components are needed for frequency synthesis; however,the user can adjust loop dynamics through selection of adamping factor capacitor whose value determines loop damping.The AD809 design guarantees that the clock output frequencywill drift low (by roughly 20%) in the absence of a signal at theinput.