MM54HC194/MM74HC1944-Bit Bidirectional Universal Shift RegisterGeneral Des criptionThis 4-bit high speed bidirectional shift register utilizes advancedsilicon-gate CMOS technology to achieve the lowpower consumption and high noise immunity of standardCMOS integrated circuits, along with the ability to drive 10LS-TTL loads. This device operates at speeds similar to theequivalent low power Schottky part.This bidirectional shift register is designed to incorporatevirtually all of the features a system designer may want in ashift register. It features parallel inputs, parallel outputs,right shift and left shift serial inputs, operating mode controlinputs, and a direct overriding clear line. The register hasfour distinct modes of operation: PARALLEL (broadside)LOAD; SHIFT RIGHT (in the direction QA toward QD);SHIFT LEFT; INHIBIT CLOCK (do nothing).Synchronous parallel loading is accomplished by applyingthe four bits of data and taking both mode control inputs, S0and S1, high. The data are loaded into their respective flipflops and appear at the outputs after the positive transitionof the CLOCK input. During loading, serial data flow is inhibited.Shift right is accomplished synchronously with the risingedge of the clock pulse when S0 is high and S1 is low.Serial data for this mode is entered at the SHIFT RIGHTdata input. When S0 is low and S1 is high, data shifts leftsynchronously and new data is entered at the SHIFT LEFTserial input. Clocking of the flip flops is inhibited when bothmode control inputs are low. The mode control inputsshould be changed only when the CLOCK input is high.The 54HC/74HC logic family is functionally as well as pinoutcompatible with the standard 54LS/74LS logic family.All inputs are protected from damage due to static dischargeby internal diode clamps to VCC and ground.