本文提出了一种具有快速瞬态响应的低压降（LDO）稳压器的设计，该稳压器在运算放大器PMOS类型中利用了一些电流以及低静态电流。 我们使用带隙基准来消除温度依赖性。 拟议的LDO稳压器采用0.18-μmCMOS技术实现，我们使用折叠式共源共栅CMOS放大器，稳定性高，提供快速瞬态响应，这说明了快速建立，LDO本身应在输出稳压器中提供等于2ps的瞬变变化的电压。 电压小于170mV。 在直流响应方面具有较高的精度，仿真结果表明，输出稳压器电压的精度为1.54±0.009V，功耗为1.51mW。

This paper presents the design of Low Drop-Out (LDO) voltage regulator has fast transient response andwhich exploits a few current else low quiescent current in the operational amplifier PMOS type. We useband-gap reference for eliminate the temperature dependence. The proposed LDO voltage regulatorimplemented in 0.18-μm CMOS technology, we use Folded cascode CMOS amplifiers high performance inthe stability , provide fast transient response which explains a fast settling, the LDO itself should provide inthe output regulator voltages at ?t equal 2ps with transient variation of the voltage less than 170mV. Highaccuracy in the DC response terms, the simulation results show that the accuracy of the output regulatorvoltages is 1.54±0.009V, and power consumption of 1.51 mW.