The DS90UR908Q converts FPD-Link II to FPD Link. It translatesa high-speed serialized interface with an embeddedclock over a single pair (FPD-Link II) to four LVDS data/controlstreams and one LVDS clock pair (FPD-Link). This serial busscheme greatly eases system design by eliminating skewproblems between clock and data, reduces the number ofconnector pins, reduces the interconnect size, weight, andcost, and overall eases PCB layout. In addition, internal DCbalanced decoding is used to support AC-coupled interconnects.