下载中心
Xilinx Zynq Digilent Zed Board boot生成说明rar
1星 发布者: 论文帝

2013-07-01 | 1积分 | 11.07MB |  3 次下载

下载 收藏 评论

文档简介
标签: Xilinx Zynq Digilent ZedBoard boot

Xilinx Zynq Digilent ZedBoard boot

Zedboard_boot_guide_IDS14_1\\boot_image

...........................\\boot_image_golden.zip

...........................\\demo

...........................\\....\\BOOT.BIN

...........................\\....\\bootimage.bif

...........................\\....\\cp_from_sdk.bat

...........................\\....\\gpio_test_0.elf

...........................\\....\\load_bits.tcl

...........................\\....\\make_bootbin.bat

...........................\\....\\ps7_init.tcl

...........................\\....\\run_gpio_test.bat

...........................\\....\\run_uboot.bat

...........................\\....\\system.bit

...........................\\....\\u-boot_autoboot_disabled.elf

...........................\\....\\xmd.ini

...........................\\....\\zynq_fsbl_0.elf

...........................\\demo_golden.zip

...........................\\doc

...........................\\...\\ZedBoard_boot_guide_IDS14_1_v1_1.pdf

...........................\\pa

...........................\\..\\project_1

...........................\\..\\.........\\project_1.data

...........................\\..\\.........\\..............\\cache

...........................\\..\\.........\\..............\\.....\\system_axi_gpio_0_wrapper_ngc_da55589a.edif

...........................\\..\\.........\\..............\\.....\\system_axi_interconnect_1_wrapper_ngc_da55589a.edif

...........................\\..\\.........\\..............\\.....\\system_axi_timer_0_wrapper_ngc_da55589a.edif

...........................\\..\\.........\\..............\\.....\\system_leds_8bit_0_wrapper_ngc_da55589a.edif

...........................\\..\\.........\\..............\\.....\\system_ngc_da55589a.edif

...........................\\..\\.........\\..............\\.....\\system_processing_system7_0_wrapper_ngc_da55589a.edif

...........................\\..\\.........\\..............\\.....\\system_stub_ngc_9efed670.edif

...........................\\..\\.........\\..............\\.....\\system_switches_8bit_0_wrapper_ngc_da55589a.edif

...........................\\..\\.........\\..............\\constrs_1

...........................\\..\\.........\\..............\\.........\\fileset.xml

...........................\\..\\.........\\..............\\runs

...........................\\..\\.........\\..............\\....\\impl_1

...........................\\..\\.........\\..............\\....\\......\\constrs_in.xml

...........................\\..\\.........\\..............\\....\\......\\impl_1.psg

...........................\\..\\.........\\..............\\....\\impl_1.psg

...........................\\..\\.........\\..............\\....\\runs.xml

...........................\\..\\.........\\..............\\....\\synth_1

...........................\\..\\.........\\..............\\....\\.......\\constrs_in.xml

...........................\\..\\.........\\..............\\....\\.......\\sources.xml

...........................\\..\\.........\\..............\\....\\.......\\synth_1.psg

...........................\\..\\.........\\..............\\....\\synth_1.psg

...........................\\..\\.........\\..............\\sources_1

...........................\\..\\.........\\..............\\.........\\fileset.xml

...........................\\..\\.........\\..............\\wt

...........................\\..\\.........\\..............\\..\\java_command_handlers.wdf

...........................\\..\\.........\\..............\\..\\project.wpc

...........................\\..\\.........\\..............\\..\\webtalk_pa.xml

...........................\\..\\.........\\project_1.ppr

...........................\\..\\.........\\project_1.runs

...........................\\..\\.........\\..............\\.jobs

...........................\\..\\.........\\..............\\.....\\job1.bat

...........................\\..\\.........\\..............\\.....\\job1.sh

...........................\\..\\.........\\..............\\.....\\job2.bat

...........................\\..\\.........\\..............\\.....\\job2.sh

...........................\\..\\.........\\..............\\.....\\job3.bat

...........................\\..\\.........\\..............\\.....\\job3.sh

...........................\\..\\.........\\..............\\.....\\job4.bat

...........................\\..\\.........\\..............\\.....\\job4.sh

...........................\\..\\.........\\..............\\.....\\job5.bat

...........................\\..\\.........\\..............\\.....\\job5.sh

...........................\\..\\.........\\..............\\.....\\job6.bat

...........................\\..\\.........\\..............\\.....\\job6.sh

...........................\\..\\.........\\..............\\impl_1

...........................\\..\\.........\\..............\\......\\.bitgen.begin.rst

...........................\\..\\.........\\..............\\......\\.bitgen.end.rst

...........................\\..\\.........\\..............\\......\\.constrs

...........................\\..\\.........\\..............\\......\\........\\system.ncf

...........................\\..\\.........\\..............\\......\\........\\system.ucf

...........................\\..\\.........\\..............\\......\\........\\system_axi_interconnect_1_wrapper.ncf

...........................\\..\\.........\\..............\\......\\........\\system_processing_system7_0_wrapper.ncf

...........................\\..\\.........\\..............\\......\\.ISE.queue.rst

...........................\\..\\.........\\..............\\......\\.map.begin.rst

...........................\\..\\.........\\..............\\......\\.map.end.rst

...........................\\..\\.........\\..............\\......\\.ngdbuild.begin.rst

...........................\\..\\.........\\..............\\......\\.ngdbuild.end.rst

...........................\\..\\.........\\..............\\......\\.par.begin.rst

...........................\\..\\.........\\..............\\......\\.par.end.rst

...........................\\..\\.........\\..............\\......\\.trce.begin.rst

...........................\\..\\.........\\..............\\......\\.trce.end.rst

...........................\\..\\.........\\..............\\......\\.xdl.begin.rst

...........................\\..\\.........\\..............\\......\\.xdl.end.rst

...........................\\..\\.........\\..............\\......\\debug_nets.cdc

...........................\\..\\.........\\..............\\......\\htr.txt

...........................\\..\\.........\\..............\\......\\ISEWrap.js

...........................\\..\\.........\\..............\\......\\ISEWrap.sh

...........................\\..\\.........\\..............\\......\\netlist.lst

...........................\\..\\.........\\..............\\......\\par_usage_statistics.html

...........................\\..\\.........\\..............\\......\\rundef.js

...........................\\..\\.........\\..............\\......\\runme.bat

...........................\\..\\.........\\..............\\......\\runme.log

...........................\\..\\.........\\..............\\......\\runme.sh

...........................\\..\\.........\\..............\\......\\system_stub.bgn

...........................\\..\\.........\\..............\\......\\system_stub.bit

...........................\\..\\.........\\..............\\......\\system_stub.bld

...........................\\..\\.........\\..............\\......\\system_stub.drc

...........................\\..\\.........\\..............\\......\\system_stub.edf

...........................\\..\\.........\\..............\\......\\system_stub.log

评论
相关视频
  • Verilog RTL编程实践

  • FPGA时序约束

  • 领航者ZYNQ开发板视频

  • Verilog HDL数字集成电路设计原理与应用

  • 正点原子领航者ZYNQ视频第一期FPGA设计篇

  • 赛灵思FPGA开发板图像及其数字处理

推荐帖子
精选电路图
  • PIC单片机控制的遥控防盗报警器电路

  • 使用ESP8266从NTP服务器获取时间并在OLED显示器上显示

  • 带有短路保护系统的5V直流稳压电源电路图

  • 如何构建一个触摸传感器电路

  • 如何调制IC555振荡器

  • 基于ICL296的大电流开关稳压器电源电路

×