2020年12月06日 | STM32F107——W5500网络通信

#ifndef _W5500_QUEUE_H_

#define _W5500_QUEUE_H_

#include "type.h"

#define W5500_FRAME_SIZE          2048

#define W5500_RECV_QUEUE_SIZE     20

typedef enum

{

  W5500_FAILURE = 0,

  W5500_OK = 1,

} w5500_queue_status_t;

typedef __packed struct

{

  uint8_t data[W5500_FRAME_SIZE];

  uint16_t length;

} w5500_frame_t;

typedef struct

{

  uint16_t in;

  uint16_t out;

  uint16_t count;

  uint16_t item_size[W5500_RECV_QUEUE_SIZE];

  uint8_t data[W5500_RECV_QUEUE_SIZE][W5500_FRAME_SIZE];

} w5500_queue_t;

extern w5500_queue_t w5500_queue_recv;

void W5500QueueInit(w5500_queue_t *q);

uint8_t W5500QueueWrite(w5500_queue_t *q, w5500_frame_t *data);

uint8_t W5500QueueRead(w5500_queue_t *q, w5500_frame_t *data);

#endif /* _W5500_QUEUE_H_ */

#include "w5500_queue.h"

#include

#include

#include "debug.h"

w5500_queue_t w5500_queue_recv;

void W5500QueueInit(w5500_queue_t *q)

{

  int i;

  for(i = 0; i < W5500_RECV_QUEUE_SIZE; ++i)

  {

    memset(q->data[i], 0, W5500_FRAME_SIZE);

  }

  memset(q->item_size, 0, sizeof(q->item_size));

  q->in   = 0;

  q->out  = 0;

  q->count = 0;

}

uint8_t W5500QueueWrite(w5500_queue_t *q, w5500_frame_t *frame)

{

  if((q->out % W5500_RECV_QUEUE_SIZE == q->in) && (q->count == W5500_RECV_QUEUE_SIZE))

  {

    return W5500_FAILURE;

  }

  q->item_size[q->in] = frame->length;

  memcpy(q->data[q->in], frame->data, frame->length);

  q->in = (q->in + 1) % W5500_RECV_QUEUE_SIZE;

  q->count++;

  return W5500_OK;

}

uint8_t W5500QueueRead(w5500_queue_t *q, w5500_frame_t *frame)

{

  if((q->in == q->out) && (q->count == 0))

  {

    return W5500_FAILURE;

  }

  frame->length = q->item_size[q->out];

  memcpy(frame->data, q->data[q->out], q->item_size[q->out]);

  q->out = (q->out + 1) % W5500_RECV_QUEUE_SIZE;

  q->count--;

  return W5500_OK;

}

#ifndef _W5500_H_

#define _W5500_H_

#include "type.h"

#include "debug.h"

/***************** Common Register *****************/

#define MR    0x0000

#define RST   0x80

#define WOL   0x20

#define PB    0x10

#define PPP   0x08

#define FARP  0x02

#define GAR   0x0001

#define SUBR  0x0005

#define SHAR  0x0009

#define SIPR  0x000f

#define INTLEVEL  0x0013

#define IR        0x0015

#define CONFLICT  0x80

#define UNREACH   0x40

#define PPPOE     0x20

#define MP        0x10

#define IMR       0x0016

#define IM_IR7    0x80

#define IM_IR6    0x40

#define IM_IR5    0x20

#define IM_IR4    0x10

#define SIR       0x0017

#define S7_INT    0x80

#define S6_INT    0x40

#define S5_INT    0x20

#define S4_INT    0x10

#define S3_INT    0x08

#define S2_INT    0x04

#define S1_INT    0x02

#define S0_INT    0x01

#define SIMR      0x0018

#define S7_IMR    0x80

#define S6_IMR    0x40

#define S5_IMR    0x20

#define S4_IMR    0x10

#define S3_IMR    0x08

#define S2_IMR    0x04

#define S1_IMR    0x02

#define S0_IMR    0x01

#define RTR_w5500 0x0019

#define RCR_w5500 0x001b

#define PTIMER  0x001c

#define PMAGIC  0x001d

#define PHA     0x001e

#define PSID    0x0024

#define PMRU    0x0026

#define UIPR    0x0028

#define UPORT   0x002c

#define PHYCFGR 0x002e

#define RST_PHY 0x80

#define OPMODE  0x40

#define DPX     0x04

#define SPD     0x02

#define LINK    0x01

#define VERR    0x0039

/********************* Socket Register *******************/

#define Sn_MR         0x0000

#define MULTI_MFEN    0x80

#define BCASTB        0x40

#define ND_MC_MMB     0x20

#define UCASTB_MIP6B  0x10

#define MR_CLOSE      0x00

#define MR_TCP        0x01

#define MR_UDP        0x02

#define MR_MACRAW     0x04

#define Sn_CR         0x0001

#define OPEN          0x01

#define LISTEN        0x02

#define CONNECT       0x04

#define DISCON        0x08

#define CLOSE         0x10

#define SEND          0x20

#define SEND_MAC      0x21

#define SEND_KEEP     0x22

#define RECV          0x40

#define Sn_IR         0x0002

#define IR_SEND_OK    0x10

#define IR_TIMEOUT    0x08

#define IR_RECV       0x04

#define IR_DISCON     0x02

#define IR_CON        0x01

#define Sn_SR         0x0003

#define SOCK_CLOSED   0x00

#define SOCK_INIT     0x13

#define SOCK_LISTEN   0x14

#define SOCK_ESTABLISHED  0x17

#define SOCK_CLOSE_WAIT   0x1c

#define SOCK_UDP      0x22

#define SOCK_MACRAW   0x02

#define SOCK_SYNSEND  0x15

#define SOCK_SYNRECV  0x16

#define SOCK_FIN_WAI  0x18

#define SOCK_CLOSING  0x1a

#define SOCK_TIME_WAIT  0x1b

#define SOCK_LAST_ACK 0x1d

#define Sn_PORT   0x0004

#define Sn_DHAR   0x0006

#define Sn_DIPR   0x000c

#define Sn_DPORTR 0x0010

#define Sn_MSSR   0x0012

#define Sn_TOS    0x0015

#define Sn_TTL    0x0016

#define Sn_RXBUF_SIZE 0x001e

#define Sn_TXBUF_SIZE 0x001f

#define Sn_TX_FSR 0x0020

#define Sn_TX_RD  0x0022

#define Sn_TX_WR  0x0024

#define Sn_RX_RSR 0x0026

#define Sn_RX_RD  0x0028

#define Sn_RX_WR  0x002a

#define Sn_IMR      0x002c

#define IMR_SENDOK  0x10

#define IMR_TIMEOUT 0x08

#define IMR_RECV    0x04

#define IMR_DISCON  0x02

#define IMR_CON     0x01

#define Sn_FRAG     0x002d

#define Sn_KPALVTR  0x002f

/*******************************************************************/

/************************ SPI Control Byte *************************/

/*******************************************************************/

/* Operation mode bits */

#define VDM   0x00

#define FDM1  0x01

#define FDM2  0x02

#define FDM4  0x03

/* Read_Write control bit */

#define RWB_READ  0x00

#define RWB_WRITE 0x04

/* Block select bits */

#define COMMON_R  0x00

/* Socket 0 */

#define S0_REG    0x08

#define S0_TX_BUF 0x10

#define S0_RX_BUF 0x18

/* Socket 1 */

#define S1_REG    0x28

#define S1_TX_BUF 0x30

#define S1_RX_BUF 0x38

/* Socket 2 */

#define S2_REG    0x48

#define S2_TX_BUF 0x50

#define S2_RX_BUF 0x58

/* Socket 3 */

#define S3_REG    0x68

#define S3_TX_BUF 0x70

#define S3_RX_BUF 0x78

/* Socket 4 */

#define S4_REG    0x88

#define S4_TX_BUF 0x90

#define S4_RX_BUF 0x98

/* Socket 5 */

#define S5_REG    0xa8

#define S5_TX_BUF 0xb0

#define S5_RX_BUF 0xb8

/* Socket 6 */

#define S6_REG    0xc8

#define S6_TX_BUF 0xd0

#define S6_RX_BUF 0xd8

/* Socket 7 */

#define S7_REG    0xe8

#define S7_TX_BUF 0xf0

#define S7_RX_BUF 0xf8

#define SOCKET_OK  0xff

#define SOCKET_FAILURE 0x00

#define S_RX_SIZE 2048  /*定义Socket接收缓冲区的大小，可以根据W5500_RMSR的设置修改 */

#define S_TX_SIZE 2048    /*定义Socket发送缓冲区的大小，可以根据W5500_TMSR的设置修改 */

/***************----- 端口数据缓冲区 -----***************/

extern uint8_t socket_rx_buffer[2048]; //端口接收数据缓冲区

extern uint8_t socket_tx_buffer[2048]; //端口发送数据缓冲区

typedef unsigned char SOCKET;     //自定义端口号数据类型

void W5500Init(void);

void W5500SocketScan(void);

uint16_t W5500SocketRecv(uint8_t *buffer);

void W5500SocketSend(uint8_t *buffer, uint16_t length);

void W5500Process(void);

extern void w5500_test(void);

#endif

#include

#include "stm32f10x.h"

#include "stm32f10x_spi.h"

#include "target.h"

#include "delay.h"

#include "w5500.h"

#include "w5500_queue.h"

#include "debug.h"

static uint8_t gateway_addr[4];

static uint8_t sub_mask[4];

static uint8_t mac_addr[6];

static uint8_t ip_addr[4];

static uint8_t s0_port[2];   //端口0的端口号(5000)

static uint8_t s0_dip[4];    //端口0目的IP地址

static uint8_t s0_dport[2];  //端口0目的端口号(6000)

static uint8_t udp_daddr[4]; //UDP(广播)模式,目的主机IP地址

static uint8_t udp_dport[2]; //UDP(广播)模式,目的主机端口号

/***************----- 端口的运行模式 -----***************/

static uint8_t s0_mode = 3; //端口0的运行模式,0:TCP服务器模式,1:TCP客户端模式,2:UDP(广播)模式

#define TCP_SERVER  0x00  //TCP服务器模式

#define TCP_CLIENT  0x01  //TCP客户端模式 

#define UDP_MODE    0x02  //UDP(广播)模式 

/***************----- 端口的运行状态 -----***************/

static uint8_t s0_state = 0; //端口0状态记录,1:端口完成初始化,2端口完成连接(可以正常传输数据)

#define S_INIT    0x01  //端口完成初始化 

#define S_CONN    0x02  //端口完成连接,可以正常传输数据 

/***************----- 端口收发数据的状态 -----***************/

static uint8_t s0_data;    //端口0接收和发送数据的状态,1:端口接收到数据,2:端口发送数据完成

#define S_RECEIVE    0x01 //端口接收到一个数据包 

#define S_TRANSMITOK 0x02 //端口发送一个数据包完成 

/***************----- 端口数据缓冲区 -----***************/

uint8_t socket_rx_buffer[2048];  //端口接收数据缓冲区