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今天是:2025年04月30日(星期三)
2021年04月30日 | CC1101与MSP430F5438的无线通信
2021-04-30 来源:eefocus
CC1101的功能强大远比于24L01。尤其通讯距离和低功耗。CC1101的数据手册网络上很多,找个搜索软件一搜一片一片的。。CC1101与MSP430F5438的无线通信CC1101与MSP430F5438的无线通信CC1101与MSP430F5438的无线通信不过我建议大家还是去ti的官网吧,那里的资料比较权威,也省得一些中文化的误解导致自己白花好几天的功夫。。
我在CC1101通讯的时候主要值得注意的,
1、SPI的底层是个基础,包括单片机带的SPI接口也好,自己用IO口实现也好,怎么来实现和硬件之间的链接了。
2、编程实现的时候注意时序问题。。SPI的时序都一样,但是操作芯片的时候可能有应答,可能没有应答。。
3、花最大功夫研究里面的寄存器的配置。整个通讯成功与否,通讯效果好不好都在寄存器的配置上。。个人认为必须理解各个寄存器的作用及使用的目的及意义了。。
4、GDO0等IO口的配置在整个系统中的运用非常重要。常见配置值0x01,0x02,0x03,0x06,0x07,其中配置值最为常用配置0x06了,但是了,对于各种需求可以相应修改了,具体手册上写的比较明白。。
以下为2个CC1101和一个MSP430F5438的一发一收通讯测试程序,实验证明通讯效果比,MC31213(xbee),2401AG,24L01都强,表现在1、通讯视距中有障碍物(如一般水泥墙壁)不影响通讯;2、整个系统电流消耗比较小大约电流在10D多个ma。具体代码如下。
//*****************************************************************************
//
// 【名称】:CC1101测试程序
// 【功能】:一个开发板实现两个CC1101模块间通讯
// 【版本】:V1.0
// 【作者】:刘
// 【日期】:2011-11-28 14:05:00
// 【说明】:软件版本定义为:V1.0为初始版本,以后改进完善的版本以此类推为V2.0,V3.0.......
//
//*****************************************************************************
//
// 【功能】:头文件定义
//
//*****************************************************************************
#include //***************************************************************************** // 常量定义 //***************************************************************************** #define WRITE_BURST 0x40 //连续写入 #define READ_SINGLE 0x80 //读 #define READ_BURST 0xC0 //连续读 #define BYTES_IN_RXFIFO 0x7F //接收缓冲区的有效字节数 #define CRC_OK 0x80 //CRC校验通过位标志 //***************************************************************************** #define Set_CC1101_GDO0_1 P1OUT |= BIT0; #define Clr_CC1101_GDO0_1 P1OUT &= ~BIT0; #define Set_CC1101_GDO2_1 P1OUT |= BIT2; #define Clr_CC1101_GDO2_1 P1OUT &= ~BIT2; #define Set_CC1101_MISO_1 P1OUT |= BIT4; #define Clr_CC1101_MISO_1 P1OUT &= ~BIT4; #define Set_CC1101_MOSI_1 P1OUT |= BIT6; #define Clr_CC1101_MOSI_1 P1OUT &= ~BIT6; #define Set_CC1101_SCK_1 P2OUT |= BIT0; #define Clr_CC1101_SCK_1 P2OUT &= ~BIT0; #define Set_CC1101_CSN_1 P2OUT |= BIT2; #define Clr_CC1101_CSN_1 P2OUT &= ~BIT2; #define Set_CC1101_GDO0_2 P3OUT |= BIT0; #define Clr_CC1101_GDO0_2 P3OUT &= ~BIT0; #define Set_CC1101_GDO2_2 P3OUT |= BIT2; #define Clr_CC1101_GDO2_2 P3OUT &= ~BIT2; #define Set_CC1101_MISO_2 P3OUT |= BIT4; #define Clr_CC1101_MISO_2 P3OUT &= ~BIT4; #define Set_CC1101_MOSI_2 P3OUT |= BIT6; #define Clr_CC1101_MOSI_2 P3OUT &= ~BIT6; #define Set_CC1101_SCK_2 P4OUT |= BIT0; #define Clr_CC1101_SCK_2 P4OUT &= ~BIT0; #define Set_CC1101_CSN_2 P4OUT |= BIT2; #define Clr_CC1101_CSN_2 P4OUT &= ~BIT2; //***************************************************************************** unsigned char PaTabel[8] = {0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60}; //***************************************************************************** unsigned char TxBuf[4]={0x01,0x02,0x03,0x00}; unsigned char RxBuf[4]={0x11,0x22,0x33,0x00}; //***************************************************************************** void InitSys(); void delay(unsigned int s); void IOinit(void); void SpiInit(void); void CpuInit(void); void RESET_CC1100(unsigned char ch); void POWER_UP_RESET_CC1100(void); void halSpiWriteReg(unsigned char addr, unsigned char value,unsigned char ch); void halSpiWriteBurstReg(unsigned char addr, unsigned char *buffer, unsigned char count,unsigned char ch); void halSpiStrobe(unsigned char strobe,unsigned char ch); unsigned char halSpiReadReg(unsigned char addr,unsigned char ch); void halSpiReadBurstReg(unsigned char addr, unsigned char *buffer, unsigned char count,unsigned char ch); unsigned char halSpiReadStatus(unsigned char addr,unsigned char ch); void halRfWriteRfSettings(void); void halRfSendPacket(unsigned char *txBuffer, unsigned char size,unsigned char ch); unsigned char halRfReceivePacket(unsigned char *rxBuffer, unsigned char *length,unsigned char ch); unsigned char SpiTxRxByte(unsigned char dat,unsigned char ch); void setRxMode(void); //***************************************************************************** // CC1100 STROBE, CONTROL AND STATUS REGSITER #define CCxxx0_IOCFG2 0x00 // GDO2 output pin configuration #define CCxxx0_IOCFG1 0x01 // GDO1 output pin configuration #define CCxxx0_IOCFG0 0x02 // GDO0 output pin configuration #define CCxxx0_FIFOTHR 0x03 // RX FIFO and TX FIFO thresholds #define CCxxx0_SYNC1 0x04 // Sync word, high INT8U #define CCxxx0_SYNC0 0x05 // Sync word, low INT8U #define CCxxx0_PKTLEN 0x06 // Packet length #define CCxxx0_PKTCTRL1 0x07 // Packet automation control #define CCxxx0_PKTCTRL0 0x08 // Packet automation control #define CCxxx0_ADDR 0x09 // Device address #define CCxxx0_CHANNR 0x0A // Channel number #define CCxxx0_FSCTRL1 0x0B // Frequency synthesizer control #define CCxxx0_FSCTRL0 0x0C // Frequency synthesizer control #define CCxxx0_FREQ2 0x0D // Frequency control word, high INT8U #define CCxxx0_FREQ1 0x0E // Frequency control word, middle INT8U #define CCxxx0_FREQ0 0x0F // Frequency control word, low INT8U #define CCxxx0_MDMCFG4 0x10 // Modem configuration #define CCxxx0_MDMCFG3 0x11 // Modem configuration #define CCxxx0_MDMCFG2 0x12 // Modem configuration #define CCxxx0_MDMCFG1 0x13 // Modem configuration #define CCxxx0_MDMCFG0 0x14 // Modem configuration #define CCxxx0_DEVIATN 0x15 // Modem deviation setting #define CCxxx0_MCSM2 0x16 // Main Radio Control State Machine configuration #define CCxxx0_MCSM1 0x17 // Main Radio Control State Machine configuration #define CCxxx0_MCSM0 0x18 // Main Radio Control State Machine configuration #define CCxxx0_FOCCFG 0x19 // Frequency Offset Compensation configuration #define CCxxx0_BSCFG 0x1A // Bit Synchronization configuration #define CCxxx0_AGCCTRL2 0x1B // AGC control #define CCxxx0_AGCCTRL1 0x1C // AGC control #define CCxxx0_AGCCTRL0 0x1D // AGC control #define CCxxx0_WOREVT1 0x1E // High INT8U Event 0 timeout #define CCxxx0_WOREVT0 0x1F // Low INT8U Event 0 timeout #define CCxxx0_WORCTRL 0x20 // Wake On Radio control #define CCxxx0_FREND1 0x21 // Front end RX configuration #define CCxxx0_FREND0 0x22 // Front end TX configuration #define CCxxx0_FSCAL3 0x23 // Frequency synthesizer calibration #define CCxxx0_FSCAL2 0x24 // Frequency synthesizer calibration #define CCxxx0_FSCAL1 0x25 // Frequency synthesizer calibration #define CCxxx0_FSCAL0 0x26 // Frequency synthesizer calibration #define CCxxx0_RCCTRL1 0x27 // RC oscillator configuration #define CCxxx0_RCCTRL0 0x28 // RC oscillator configuration #define CCxxx0_FSTEST 0x29 // Frequency synthesizer calibration control #define CCxxx0_PTEST 0x2A // Production test #define CCxxx0_AGCTEST 0x2B // AGC test #define CCxxx0_TEST2 0x2C // Various test settings #define CCxxx0_TEST1 0x2D // Various test settings #define CCxxx0_TEST0 0x2E // Various test settings // Strobe commands #define CCxxx0_SRES 0x30 // Reset chip. #define CCxxx0_SFSTXON 0x31 // Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1). // If in RX/TX: Go to a wait state where only the synthesizer is // running (for quick RX / TX turnaround). #define CCxxx0_SXOFF 0x32 // Turn off crystal oscillator. #define CCxxx0_SCAL 0x33 // Calibrate frequency synthesizer and turn it off // (enables quick start). #define CCxxx0_SRX 0x34 // Enable RX. Perform calibration first if coming from IDLE and // MCSM0.FS_AUTOCAL=1. #define CCxxx0_STX 0x35 // In IDLE state: Enable TX. Perform calibration first if // MCSM0.FS_AUTOCAL=1. If in RX state and CCA is enabled: // Only go to TX if channel is clear. #define CCxxx0_SIDLE 0x36 // Exit RX / TX, turn off frequency synthesizer and exit // Wake-On-Radio mode if applicable. #define CCxxx0_SAFC 0x37 // Perform AFC adjustment of the frequency synthesizer #define CCxxx0_SWOR 0x38 // Start automatic RX polling sequence (Wake-on-Radio) #define CCxxx0_SPWD 0x39 // Enter power down mode when CSn goes high. #define CCxxx0_SFRX 0x3A // Flush the RX FIFO buffer. #define CCxxx0_SFTX 0x3B // Flush the TX FIFO buffer. #define CCxxx0_SWORRST 0x3C // Reset real time clock. #define CCxxx0_SNOP 0x3D // No operation. May be used to pad strobe commands to two // INT8Us for simpler software. #define CCxxx0_PARTNUM 0x30 #define CCxxx0_VERSION 0x31 #define CCxxx0_FREQEST 0x32 #define CCxxx0_LQI 0x33 #define CCxxx0_RSSI 0x34 #define CCxxx0_MARCSTATE 0x35 #define CCxxx0_WORTIME1 0x36 #define CCxxx0_WORTIME0 0x37 #define CCxxx0_PKTSTATUS 0x38 #define CCxxx0_VCO_VC_DAC 0x39 #define CCxxx0_TXBYTES 0x3A #define CCxxx0_RXBYTES 0x3B #define CCxxx0_PATABLE 0x3E #define CCxxx0_TXFIFO 0x3F #define CCxxx0_RXFIFO 0x3F // RF_SETTINGS is a data structure which contains all relevant CCxxx0 registers typedef struct S_RF_SETTINGS { unsigned char FSCTRL2; //自已加的 unsigned char FSCTRL1; // Frequency synthesizer control. unsigned char FSCTRL0; // Frequency synthesizer control. unsigned char FREQ2; // Frequency control word, high INT8U. unsigned char FREQ1; // Frequency control word, middle INT8U. unsigned char FREQ0; // Frequency control word, low INT8U. unsigned char MDMCFG4; // Modem configuration. unsigned char MDMCFG3; // Modem configuration. unsigned char MDMCFG2; // Modem configuration. unsigned char MDMCFG1; // Modem configuration. unsigned char MDMCFG0; // Modem configuration. unsigned char CHANNR; // Channel number. unsigned char DEVIATN; // Modem deviation setting (when FSK modulation is enabled). unsigned char FREND1; // Front end RX configuration. unsigned char FREND0; // Front end RX configuration. unsigned char MCSM0; // Main Radio Control State Machine configuration. unsigned char FOCCFG; // Frequency Offset Compensation Configuration. unsigned char BSCFG; // Bit synchronization Configuration. unsigned char AGCCTRL2; // AGC control. unsigned char AGCCTRL1; // AGC control. unsigned char AGCCTRL0; // AGC control. unsigned char FSCAL3; // Frequency synthesizer calibration. unsigned char FSCAL2; // Frequency synthesizer calibration. unsigned char FSCAL1; // Frequency synthesizer calibration. unsigned char FSCAL0; // Frequency synthesizer calibration. unsigned char FSTEST; // Frequency synthesizer calibration control unsigned char TEST2; // Various test settings. unsigned char TEST1; // Various test settings. unsigned char TEST0; // Various test settings. unsigned char IOCFG2; // GDO2 output pin configuration
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