[求助] TM4c129在EPI总线的通用模式下怎么实现收发FPGA的数据

wzllonglong 2019-11-26 22:09 楼主

tm4c129EPI总线通用模式具体配置如下：

void EPI_Init()
{

   SysCtlPeripheralEnable(SYSCTL_PERIPH_EPI0);    //使能EPI模块

   SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
   SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
   SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
   SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
   SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
   SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOH);
   SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOJ);

   GPIOPinConfigure(GPIO_PH3_EPI0S0);    //引脚设置
   GPIOPinConfigure(GPIO_PH2_EPI0S1);
   GPIOPinConfigure(GPIO_PC4_EPI0S2);
   GPIOPinConfigure(GPIO_PC5_EPI0S3);
   GPIOPinConfigure(GPIO_PC6_EPI0S4);
   GPIOPinConfigure(GPIO_PC7_EPI0S5);
   GPIOPinConfigure(GPIO_PH0_EPI0S6);
   GPIOPinConfigure(GPIO_PH1_EPI0S7);
   GPIOPinConfigure(GPIO_PH7_EPI0S27);
   GPIOPinConfigure(GPIO_PD5_EPI0S28);
   GPIOPinConfigure(GPIO_PD6_EPI0S29);
//    GPIOPinConfigure(GPIO_PJ6_EPI0S30);
   GPIOPinConfigure(GPIO_PG7_EPI0S31);

   GPIOPinTypeEPI(GPIO_PORTH_BASE,GPIO_PIN_3 );  //D0
   GPIOPinTypeEPI(GPIO_PORTH_BASE,GPIO_PIN_2 );  //D1
   GPIOPinTypeEPI(GPIO_PORTC_BASE,GPIO_PIN_4 );  //D2
   GPIOPinTypeEPI(GPIO_PORTC_BASE,GPIO_PIN_5 );  //D3
   GPIOPinTypeEPI(GPIO_PORTC_BASE,GPIO_PIN_6 );  //D4
   GPIOPinTypeEPI(GPIO_PORTC_BASE,GPIO_PIN_7 );  //D5
   GPIOPinTypeEPI(GPIO_PORTH_BASE,GPIO_PIN_0 );  //D6
   GPIOPinTypeEPI(GPIO_PORTH_BASE,GPIO_PIN_1 );  //D7
   GPIOPinTypeEPI(GPIO_PORTH_BASE,GPIO_PIN_7 );  //iRDY
   GPIOPinTypeEPI(GPIO_PORTD_BASE,GPIO_PIN_5 );  //WR
   GPIOPinTypeEPI(GPIO_PORTD_BASE,GPIO_PIN_6 );  //RD
//    GPIOPinTypeEPI(GPIO_PORTJ_BASE,GPIO_PIN_6 );  //FRAME
   GPIOPinTypeEPI(GPIO_PORTG_BASE,GPIO_PIN_7 );  //clk

   EPIModeSet(EPI0_BASE,EPI_MODE_GENERAL);
   EPIConfigGPModeSet(EPI0_BASE,EPI_GPMODE_ASIZE_NONE|EPI_GPMODE_DSIZE_8|EPI_GPMODE_RDYEN|EPI_GPMODE_CLKPIN|EPI_GPMODE_READ2CYCLE|EPI_GPMODE_READWRITE,0,0);
//    HWREG(EPI0_BASE + EPI_O_GPCFG2) =0x00000000;
//    HWREG(EPI0_BASE + EPI_O_GPCFG) =0x90240000;
//    EPIConfigGPModeSet(EPI0_BASE,EPI_GPMODE_ASIZE_NONE|EPI_GPMODE_DSIZE_8|EPI_GPMODE_CLKGATE|EPI_GPMODE_CLKPIN|EPI_GPMODE_READ2CYCLE|EPI_GPMODE_READWRITE,0,0);

   EPIFIFOConfig(EPI0_BASE,EPI_FIFO_CONFIG_RX_FULL);
   EPIDividerSet(EPI0_BASE, 0);    //50M

   EPIIntEnable(EPI0_BASE,EPI_INT_RXREQ);    //接收中断
   IntEnable(INT_EPI0);
   IntMasterEnable();

/*    HWREG(EPI0_BASE + EPI_O_ADDRMAP) = 0x00000000; //no per addr,256b ram
   HWREG(EPI0_BASE + EPI_O_RSIZE0)  = 0x00000001; //8bit data
   HWREG(EPI0_BASE + EPI_O_RADDR0)  = 0x00000000; //current addr    */

   EPINonBlockingReadConfigure(EPI0_BASE,0,EPI_NBCONFIG_SIZE_8,0);



}