我现在用开发板，lcd例程是在内部flash跑的，这个没问题。
但是我现在要在外部nor flash跑，出了问题：
1.我debug仿真，单步执行到lcd启动,然后写入图片数据到sdram，图片是显示的。但是我最后while(1); 空操作，如果一直全速跑下去，图片就不显示了，debug停下来，图片显示，单步空操作的时候，图片会抖动，一旦全速，图片又不显示了。（这个现象在内部flash跑的时候没有的）。
如果我代码烧到flash后，脱机跑，也是不显示(nor flash配置没问题，因为之前的一个跑马灯程序我是成功仿真+脱机跑的)
2. 我每次仿真，第一次总归会在SDRAMInit();这个函数单步的时候出错，出现"unable to halt arm core"，退出debug,第二次debug进去，SDRAMInit();单步仿真就可以走过去了。 如果我仿真里面reset一下,重新从main开始单步，这个错误就还会出来。
周公，请帮忙解答一下。这2个问题的原因，非常感谢：
附：部分代码
---------------------------------------------------------------
void lcd_configure_gpio( void)
{
PINSEL11 |= 0x0000000F;
PINSEL10 &= 0xFFFFFFF7;
PINSEL0 |= 0x00055500;
PINSEL3 |= 0x05555500;
PINSEL4 |= 0x054FFFFF;
PINSEL9 |= 0x0A000000;
}
void LCD_Disp_Config( void)
{
int i;
PCONP |= 0x00100000;//使能LCD Controller
//以下寄存器参看LPC24XX用户手册，LCD一章。结合SHARP LQ043液晶参数进行设置
LCD_CTRL = 0x00;
LCD_CFG = 0x08;
LCD_CTRL = (0x01 << 5)|(0x05 << 1);
LCD_TIMH = (0x0b << 24)|(0x0b << 16)|(0x1d << 8 )|(0x1D << 2);
LCD_TIMV = (0x0c << 24)|(0x0c << 16)|(0x02 << 10)|(0x10F);
LCD_POL = (0x01 << 26)|(0x1DF << 16)|(0x00 << 14)|(0x01 << 13)|(0x01 << 12)|(0x01 << 11)|(0x14);
LCD_CTRL |= 0x01;
delayMs(0,50);
LCD_CTRL |= (0x01 << 11);
}
/******************************************************************************
** Function name: DMAHandler
**
** Descriptions: DMA interrupt handler
**
** parameters: None
** Returned value: None
**
******************************************************************************/
__irq __arm void DMAHandler (void)
{
DWORD regVal;
//IENABLE; /* handles nested interrupt */
regVal = LCD_INTSTAT;
if ( (regVal&0x00000002) == 0x00000002 ) //FUFMIS
{
LCD_INTCLR |= 0x00000002;
}
//LNBUIC
if ( (regVal&0x00000004) == 0x00000004 )
{
LCD_INTCLR |= 0x00000004;
}
//VCompMIS
if ( (regVal&0x00000008) == 0x00000008 )
{
LCD_INTCLR |= 0x00000008;
}
//BERRAW
if ( (regVal&0x00000010) == 0x00000010 )
{
LCD_INTCLR |= 0x00000010;
}
//IDISABLE;
VICVectAddr = 0; /* Acknowledge Interrupt */
}
/******************************************************************************
** Function name: DMA_Init
**
** Descriptions:
**
** parameters:
** Returned value:
**
******************************************************************************/
DWORD DMA_Init( void)
{
PCONP |= (1 << 29); /* Enable GPDMA clock */
/* clear all interrupts on channel 0 and 1 */
GPDMA_INT_TCCLR = 0x03;
GPDMA_INT_ERR_CLR = 0x03;
GPDMA_CONFIG = 0x01; /* Enable DMA channels, little endian */
LCD_INTMSK |= (0x01 << 4)|(0x01 << 3)|(0x01 << 2)|(0x00 << 1);
if ( install_irq( EINT2_INT, (void *)DMAHandler, HIGHEST_PRIORITY ) == FALSE )
{
return ( FALSE );
}
return (TRUE);
}
---------------------------------------------------------------
void SDRAMInit( void )
{
DWORD i, dummy = dummy;
/*************************************************************************
* Initialize EMC and SDRAM
*************************************************************************/
// SCS |= 0x00000002; /* Reset EMC */
EMC_CTRL = 0x00000001; /*Disable Address mirror*/
PCONP |= 0x00000800; /* Turn On EMC PCLK */
PINSEL4 |= 0x50000000;
PINSEL5 |= 0x05050555;
PINSEL6 |= 0x55555555;
PINSEL8 |= 0x55555555;
PINSEL9 |= 0x50555555;
EMC_DYN_RP = 2;
EMC_DYN_RAS = 3;
EMC_DYN_SREX = 7;
EMC_DYN_APR = 2;
EMC_DYN_DAL = 5;
EMC_DYN_WR = 1;
EMC_DYN_RC = 5;
EMC_DYN_RFC = 5;
EMC_DYN_XSR = 7;
EMC_DYN_RRD = 1;
EMC_DYN_MRD = 2;
EMC_DYN_RD_CFG = 1; /* Command delayed strategy */
/* Default setting, RAS latency 3 CCLKs, CAS latenty 3 CCLKs. */
EMC_DYN_RASCAS0 = 0x00000303;
#if ENG_BOARD_LPC24XX /* NXP engineering board */
/* 256MB, 16Mx16, 4 banks, row=12, column=9 */
EMC_DYN_CFG0 = 0x00000480;
#else /* Embedded Artists board */
/* 256MB, 16Mx16, 4 banks, row=13, column=9 */
EMC_DYN_CFG0 = 0x00000680;
#endif
delayMs(0, 100); /* use timer 1 */
/* Mem clock enable, CLKOUT runs, send command: NOP */
EMC_DYN_CTRL = 0x00000183;
delayMs(0, 200); /* use timer 1 */
/* Send command: PRECHARGE-ALL, shortest possible refresh period */
EMC_DYN_CTRL = 0x00000103;
/* set 32 CCLKs between SDRAM refresh cycles */
EMC_DYN_RFSH = 0x00000002;
for(i = 0; i < 0x40; i++); /* wait 128 AHB clock cycles */
/* set 28 x 16CCLKs=448CCLK=7us between SDRAM refresh cycles */
EMC_DYN_RFSH = 28;
/* To set mode register in SDRAM, enter mode by issue
MODE command, after finishing, bailout and back to NORMAL mode. */
/* Mem clock enable, CLKOUT runs, send command: MODE */
EMC_DYN_CTRL = 0x00000083;
/* Set mode register in SDRAM */
/* Mode regitster table for Micron's MT48LCxx */
/* bit 9: Programmed burst length(0)
bit 8~7: Normal mode(0)
bit 6~4: CAS latency 3
bit 3: Sequential(0)
bit 2~0: Burst length is 8
row position is 12 */
dummy = *((volatile DWORD *)(SDRAM_BASE_ADDR | (0x33 << 12)));
EMC_DYN_CTRL = 0x00000000; /* Send command: NORMAL */
EMC_DYN_CFG0 |= 0x00080000; /* Enable buffer */
delayMs(0, 1); /* Use timer 1 */
return;
}
--------------------------------------------------------------
int main ( )
{
DWORD i,j,col,row;
DWORD counter=0;
volatile DWORD *wr_ptr;
volatile BYTE *char_wr_ptr;
TargetResetInit();
init_timer( 0, TIME_INTERVAL );
enable_timer( 0 );
SDRAMInit();
wr_ptr = (DWORD *)SDRAM_BASE_ADDR;
char_wr_ptr = (BYTE *)wr_ptr;
/* 按照8bit的方式访问SDRAM测试前，清除SDRAM相应地址的内容 */
/**/ for ( i= 0; i < test_SDRAM_SIZE/4; i++ )
{
*wr_ptr++ = 0;
}
lcd_configure_gpio();
LCD_Disp_Config();
DMA_SRC = 0xA0000000;
LCD_UPBASE = DMA_SRC;
DMA_Init();
/* 按点阵方式将图片数据送入SDRAM，LCD分辨率为480×272 ，图片大小为75×100 */
j=0;
wr_ptr = (DWORD *)SDRAM_BASE_ADDR;
//wr_ptr = (DWORD *)TEST_USB_ADDR;
char_wr_ptr = (BYTE *)wr_ptr;
for(col=0; col<272; col++)
{
for(row=0; row<480; row++)
if(col>=picY && col<(picY + picHigh))
{
if(row>= picX&& row<(picX + picWidth))
{
*char_wr_ptr++ = gImage_1[j++];
*char_wr_ptr++ = gImage_1[j++];
*char_wr_ptr++ = gImage_1[j++];
*char_wr_ptr++ = 0x00;
}
else
{
*char_wr_ptr++;
*char_wr_ptr++;
*char_wr_ptr++;
*char_wr_ptr++;
}
}
else
{
*char_wr_ptr++;
*char_wr_ptr++;
*char_wr_ptr++;
*char_wr_ptr++;
}
}
while(1);
}
这个问题我也发现了,楼上用的是IAR吧,我每次要硬件复位后才能仿真,
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